Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - battery management Surge protection Li-Ion SON 8 Exposed Pad (3x3) Surface-mount

OUT

VDD

CB_EN

GND

VC2

VC1

VC1_CB

bq29200

bq29209

www.ti.com

SLUSA52A –SEPTEMBER 2010–REVISED NOVEMBER 2010

Voltage Protection with Automatic Cell Balance for 2-Series Cell Li-Ion Batteries

Check for Samples: bq29200 , bq29209

FEATURES

• External Cell Balancing Mode Supported

• 2-Series Cell Secondary Protection • High-Accuracy Overvoltage Protection:

• Automatic Cell Imbalance Correction with – ±25 mV with T

= 0°C to 60°C

External Enable Control

• Fixed Overvoltage Protection Thresholds:

– ±30 mV Enable, 0 mV Disable Thresholds 4.30 V, 4.35 V

Typical

• Small 8L DRB Package

• External Capacitor-Controlled Delay Timer

APPLICATIONS

• External Resistor-Controlled Cell Balance

• 2

Level Protection in Li-Ion Battery Packs

Current

– Netbook Computers

• Low Power Consumption I

< 3 µA Typical

– Power Tools

CELL

(ALL) < V

PROTECT

)

– Portable Equipment and Instrumentation

• Internal Cell Balancing Handles Current

– Battery Backup Systems

up to 15 mA

DESCRIPTION

The bq2920x device is a secondary overvoltage protection IC for 2-series cell lithium-ion battery packs that

incorporates a high-accuracy precision overvoltage detection circuit and automatic cell imbalance correction.

The voltage of each cell in a 2-series cell battery pack is compared to an internal reference voltage. If either cell

reaches an overvoltage condition, the bq2920x device starts a timer that provides a delay proportional to the

capacitance on the CD pin. Upon expiration of the internal timer, the OUT pin changes from low to high state.

If enabled, the bq2920x performs automatic cell imbalance correction where the two cells are automatically

corrected for voltage imbalance by loading the cell with the higher charge voltage with a small balancing current.

When the cells are measured to be equal within nominally 0 mV, the load current is removed. It will be re-applied

if the imbalance exceeds nominally 30 mV. The cell mismatch correction circuitry is enabled by pulling the

CB_EN pin low, and disabled when CB_EN is pulled to VDD or greater than 2.2 V.

If the internal cell balancing current of up to 15 mA is insufficient, the bq2920x may be configured via external

circuitry to support much higher external cell balancing current.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (17 pages)

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bq29200 bq29209 www.ti.
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bq29200 bq29209 SLUSA52A – SEPTEMBER 2010 – REVISED NOVEMBER 2010 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TA PART NUMBER –40°C to +110°C PACKAGE BQ29200 PACKAGE DESIGNATOR PACKAGE MARKING OVP DRB 200 209 QFN-8 BQ29209 ORDERING INFORMATION TAPE AND REEL (LARGE) TAPE AND REEL (SMALL) 4.
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bq29200 bq29209 www.ti.com SLUSA52A – SEPTEMBER 2010 – REVISED NOVEMBER 2010 FUNCTIONAL BLOCK DIAGRAM VDD 5 V LDO and POR VC2 CTRL CB2_EN + CB Logic VC1 Hys. – ICD(CHG) = 150 nA CB1_EN + VC1_CB OUT – GND CB_EN CD 0.1 µF Figure 1. Block Diagram ABSOLUTE MAXIMUM RATINGS Over-operating free-air temperature range (unless otherwise noted) (1) VALUE/UNIT Supply voltage range, VMAX Input voltage range, VIN Output voltage range, VOUT VDD–GND –0.3 V to 16 V VC2–GND, VC1–GND –0.
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bq29200 bq29209 SLUSA52A – SEPTEMBER 2010 – REVISED NOVEMBER 2010 www.ti.com ELECTRICAL CHARACTERISTICS Typical values stated where TA = 25°C and VDD = 7.2 V. Min/Max values stated where TA = –40°C to 110°C and VDD = 4 V to 10 V (unless otherwise noted).
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bq29200 bq29209 www.ti.com SLUSA52A – SEPTEMBER 2010 – REVISED NOVEMBER 2010 RECOMMENDED CELL BALANCING CONFIGURATIONS Typical values stated where TA = 25°C and (VC2–VC1), (VC1–GND) = 3.8 V. Min/Max values stated where TA = –40°C to 110°C, VDD = 4 V to 10 V, and (VC2–VC1), (VC1–GND) = 3.0 V to 4.2 V. All values assume recommended supply voltage filter resistance RVD of 100 Ω and 5% accurate or better cell balance resistor RCB.
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bq29200 bq29209 SLUSA52A – SEPTEMBER 2010 – REVISED NOVEMBER 2010 www.ti.com TEST CONDITIONS IIN IIN 1 VC2 OUT 8 2 VC1 VDD 7 3 VC1_CB ICC CB_EN 6 4 CD GND 5 Figure 4. ICC, IIN Measurement VCELL ICB VCELL±VCB 1 VC2 OUT 8 2 VC1 VDD 7 3 VC1_CB ICB CB_EN 6 4 CD ICB_EN GND 5 Figure 5.
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bq29200 bq29209 www.ti.com SLUSA52A – SEPTEMBER 2010 – REVISED NOVEMBER 2010 VPROTECT VPROTECT - VHYS Cell Voltage VC2-VC1, VC1-GND td L H OUT Figure 6. Timing for Overvoltage Sensing CELL CONNECTION SEQUENCE NOTE Before connecting the cells, propagate the overvoltage delay timing capacitor, CCD. The recommended cell connection sequence begins from the bottom of the stack, as follows: 1. GND 2. VC1 3.
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bq29200 bq29209 SLUSA52A – SEPTEMBER 2010 – REVISED NOVEMBER 2010 www.ti.com 111% 100% 79% VC2 8.4 V 7.6 V 6V Figure 7. VMM_DET_ON and VMM_DET_OFF Threshold BATTERY CONNECTION Figure 8 shows the configuration for the 2-series cell battery connection. RVD CELL2 RIN CIN RIN CIN 1 VC2 OUT 8 2 VC1 VDD 7 3 VC1_CB CELL1 4 CD RCB CB_EN 6 GND 5 CVD CCD Figure 8.
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bq29200 bq29209 www.ti.com SLUSA52A – SEPTEMBER 2010 – REVISED NOVEMBER 2010 Ibal = VCELL RCB _EXT CUSTOMER TEST MODE Customer Test Mode (CTM) helps to greatly reduce the overvoltage detection delay time and enable quicker customer production testing. This mode is intended for quick-pass board-level verification tests, and, as such, individual cell overvoltage levels may deviate slightly from the specifications (VPROTECT, VOA).
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bq29200 bq29209 SLUSA52A – SEPTEMBER 2010 – REVISED NOVEMBER 2010 www.ti.com REVISION HISTORY Changes from Original (June 2010) to Revision A Page • Changed values in XDELAY and XDELAY_CTM electrical characteristics ..................................................................................... 4 • Changed specifications for VOUT ...........................................................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing BQ29200DRBR SON DRB 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 BQ29200DRBT SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 BQ29209DRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ29200DRBR SON DRB 8 3000 367.0 367.0 35.0 BQ29200DRBT SON DRB 8 250 210.0 185.0 35.0 BQ29209DRBR SON DRB 8 3000 367.0 367.0 35.0 BQ29209DRBT SON DRB 8 250 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.