Datasheet
bq27541-G1
www.ti.com
SLUSAL6C –NOVEMBER 2011–REVISED OCTOBER 2012
HDQ serial communication is normally initiated by the host processor sending a break command to the bq27541-
G1. A break is detected when the DATA pin is driven to a logic-low state for a time t
(B)
or greater. The DATA pin
should then be returned to its normal ready high logic state for a time t
(BR)
. The bq27541-G1 is now ready to
receive information from the host processor.
The bq27541-G1 is shipped in the I2C mode. TI provides tools to enable the HDQ peripheral. The SLUA408a
application report provides details of HDQ communication basics.
HDQ HOST INTERRUPTION FEATURE
The default bq27541-G1 behaves as an HDQ slave only device when HDQ mode is enabled. If the HDQ
interrupt function is enabled, the bq27541-G1 is capable of mastering and also communicating to a HDQ device.
There is no mechanism for negotiating who is to function as the HDQ master and care must be taken to avoid
message collisions. The interrupt is signaled to the host processor with the bq27541-G1 mastering an HDQ
"message". This message is a fixed message that will be used to signal the interrupt condition. The message
itself is 0x80 (slave write to register 0x00) with no data byte being sent as the command is not intended to
convey any status of the interrupt condition. The HDQ interrupt function is disabled by default and needs to be
enabled by command.
When the SET_HDQINTEN subcommand is received, the bq27541-G1 will detect any of the interrupt conditions
and assert the interrupt at one second intervals until the CLEAR_HDQINTEN command is received or the count
of HDQHostIntrTries has lapsed.
The number of tries for interrupting the host is determined by the data flash parameter named
HDQHostIntrTries.
Low Battery Capacity
This feature will work identically to SOC1. It will use the same data flash entries as SOC1 and will trigger
interrupts as long as SOC1 = 1 and HDQIntEN=1.
Temperature
This feature will trigger an interrupt based on the OTC (Over-Temperature in Charge) or OTD (Over-Temperature
in Discharge) condition being met. It uses the same data flash entries as OTC or OTD and will trigger interrupts
as long as either the OTD or OTC condition is met and HDQIntEN=1.
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