Datasheet
CSP-12
(TOP VIEW)
A1
A2
A3
B1
B2
C 1
C 2
C 3
D 1
D 2
D 3B3
A1
A2
A3
B1
B2
B3
C 1
C 2
C 3
D 1
D 2
D 3
CSP-12
(BOTTOMVIEW)
Not Recommended for New Designs
bq27505
SLUS884–FEBRUARY 2009
www.ti.com
2.3 PIN ASSIGNMENT
Table 2-1. PIN FUNCTIONS
TERMINAL
TYPE
(1)
DESCRIPTION
NAME NO.
Analog input pin connected to the internal coulomb counter where SRP is nearest the PACK–
SRP A1 IA
connection. Connect to 5-mΩ to 20-mΩ sense resistor.
Analog input pin connected to the internal coulomb counter where SRN is nearest the Vss
SRN B1 IA
connection. Connect to 5-mΩ to 20-mΩ sense resistor.
Battery Low output indicator. Active high by default, though polarity can be configured through
BAT_LOW C1 O
the [BATL_POL] bit of Operation Configuration. Push-pull output.
Vss D1 P Device ground
Battery-good indicator. Active-low by default, though polarity can be configured through the
BAT_GD A2 O
[BATG_POL] bit of Operation Configuration. Push-pull output.
SOC state interrupts output. Generate a pulse under the conditions specified by Table 5-5. Open
SOC_INT B2 I/O
drain output.
Cell-voltage measurement input. ADC input. Recommend 4.8V maximum for conversion
BAT C2 I
accuracy.
Vcc D2 P Processor power input. Decouple with minimum 0.1mF ceramic capacitor.
Slave I
2
C serial communications data line for communication with system (Master). Open-drain
SDA A3 I/O
I/O. Use with 10kΩ pull-up resistor (typical).
Slave I
2
C serial communications clock input line for communication with system (Master). Use
SCL B3 I
with 10kΩ pull-up resistor (typical).
Battery-insertion detection input. Power pin for pack thermistor network. Thermistor-multiplexer
BI/TOUT C3 I/O
control pin. Use with pull-up resistor >1MΩ (1.8 MΩ typical).
TS D3 IA Pack thermistor voltage sense (use 103AT-type thermistor). ADC input
(1) I/O = Digital input/output, IA = Analog input, P = Power connection
4 ELECTRICAL SPECIFICATIONS Copyright © 2009, Texas Instruments Incorporated
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