Datasheet
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MEMORY DESCRIPTIONS
Non-Volatile OTP Memory
A = A +1
ROM
Function
Flow
Master TX:
16-bitaddress, A
MasterRX:
CRCofM/Fcmd& A
MasterRX:
D
MasterRX:
8-bitdata@ A
A =0x007F?
YES
Read
Memory
Flow
M/F=0xF0
NO
A = A +1
A <0x007F?
YES
NO
ROM
Function
Flow
Master TX:
ProgrammingPulse
MasterRX:
CRCofalldatatransmitted
MasterRX:
CRCofpreloaded
A[7:0]&shiftedD
YES
Write
Memory
Flow
M/F=0x0F
NO
A <0x007F?
NO
ROM
Function
Flow
Master TX:
16-bitaddress, A
MasterRX:
CRCofM/Fcmd& A
MasterRX:
8-bitdata@ A
A[4:0]=Last
addressofpage
YES
Read
Page
Flow
M/F=0xC3
Master TX:
16-bitaddress, A
A = A +1
MasterRX:
CRCofalldatatransmitted
MasterRX:
CRCofM/Fcmd, A &D
Master TX:
8-bitdata,D
Master TX:
8-bitdata,D
CRC= A[7:0]
(1)
(1)
(1)
bq26100
SLUS696A – JUNE 2006 – REVISED FEBRUARY 2007
The bq26100 has a memory and command structure that is compatible with the bq2022, however additional
memory and commands have been added. The bq26100 uses a combination of non-volatile
One-Time-Programmable (OTP), non-volatile EEPROM, and volatile registers. The memory is split into the
following sections:
The One Time Programmable (OTP) memory is intended for factory programming. Programming the OTP
requires putting a 7-V pulse on the communication pin after writing the data to the intended address.
General Use – Memory Function Commands 0xF0 (Read) and 0x0F (Write)
The general use space is erased to read 0x00. Data written to the general space is ORed with data already
present at the address to be written. A bit can only be flipped from 0 to 1.
Table 1. General Memory Space Addressing
ADDRESSES FUNCTION
0x007F – 0x0060 Page 3 – 32 bytes general use
0x005F – 0x0040 Page 2 – 32 bytes general use
0x003F – 0x0020 Page 1 – 32 bytes general use
0x001F – 0x0000 Page 0 – 32 bytes general use
(1) 16-Bit address is sent with lower 8-bit address followed by higher 8-bit address with least significant bit first.
Figure 6. General Memory OTP Write/Read Flows
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