Datasheet

bq24765
VICM
BOOT
DCINP
PHASE
VDDP
PGND
CSSP
CSSN
VFB
CSOP
6VLDO
20xV(CSSP-CSSN)
+
-
20xV(CSOP-CSON)
COMP
ERROR
AMPLIFIER
1x
20xV(CSSP-CSSN)
ENA
20uA
IIN_ER
BAT_ER
ICH_ER
IIN_REG
VBAT_REG
IBAT_ REG
CSON
10mA
DC-DC
CONVERTER
PWMLOGIC
DCINP
4V
+
_
V(BOOT-PHASE)
REFRESH
C
BTST
CHRG_ENA
155degC
ICTj TSHUT
LEVEL
SHIFTER
+
-
+
-
+
-
+
-
+
-
+
-
+
-
CHG_UCP
BAT_SHORT
20xV(CSOP-CSON)
CHG_OCP
+
-
145% XIBAT _REG
SDA
SCL
VDDSMB
VBAT_REG
IBAT_REG
IIN_REG
SMBus
Logic
CHRG_V
(11 bitDAC)
CHRG_I
(6 bitDAC)
INPUT_I
(6 bitDAC)
20X
V(DCINA-VFB)
(DCIN-VFB)_CMP
+
-
185mV
CHRG_ENA
DCINA
3.3V
LDO
VREF
ACOK
DCIN_UVLO
+
-
DCINA
+
-
4V
ICREF
-
+VICM
ICOUT
AGND
FBO
ACIN
CHG_UCP
+
-
CSOP
VFB
BAT_SHORT
+
-
2.5V
+
-
FBO
EAI
EAO
0.6V
+
-
ACOK
2.4V
CE
SMBus_Bias
EAI
EAO
VREF
DCINA
+
-
10mV
VDDSMB_UVLO
+
-
VDDSMB
+
-
2.35V
DAC_VALID
DAC_VALID
DCIN_UVLO
(DCIN-VFB)_CMP
DCIN_UVLO
ENA_BIAS
ENA_BIAS
N
N
QTOP
QBOT
DCINP
DCINP
PHASE
PHASE
PGND
PGND
CBC_OCP
PHASE
PHASE
PGND
VFB
BAT_LOWV
+
-
3.6V
+
-
BAT_LOWV
200mV
TEMP_ER
+
-
120dgC
Tj
20X
+
-
CSON
bq24765
www.ti.com SLUS999 –NOVEMBER 2009
FUNCTIONAL BLOCK DIAGRAM
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