Datasheet

REGN plt plt
on off
on off
V - V V
I = , I =
R R
SW GD GS
1
Q = Q + Q
2
´
SW SW
on off
on off
Q Q
t = , t =
I I
2
top CHG DS(on) IN CHG on off s
1
P = D I R + V I (t + t )
2
f´ ´ ´ ´ ´ ´
Not Recommended for New Designs
bq24725
SLUS702A –JULY 2010–REVISED NOVEMBER 2010 www.ti.com
The bq24725 has internal loop compensator. To get good loop stability, the resonant frequency of the output
inductor and output capacitor should be designed between 10 kHz and 20 kHz. The preferred ceramic capacitor
is 25V X7R or X5R for output capacitor. 10-20μF capacitance is suggested for a typical of 3-4A charging current.
Place the capacitors after charging current sensing resistor to get the best charge current regulation accuracy.
Ceramic capacitors show a dc-bias effect. This effect reduces the effective capacitance when a dc-bias voltage is
applied across a ceramic capacitor, as on the output capacitor of a charger. The effect may lead to a significant
capacitance drop, especially for high output voltages and small capacitor packages. See the manufacturer's data
sheet about the performance with a dc bias voltage applied. It may be necessary to choose a higher voltage
rating or nominal capacitance value in order to get the required value at the operating point.
Power MOSFETs Selection
Two external N-channel MOSFETs are used for a synchronous switching battery charger. The gate drivers are
internally integrated into the IC with 6V of gate drive voltage. 30V or higher voltage rating MOSFETs are
preferred for 19-20V input voltage.
Figure-of-merit (FOM) is usually used for selecting proper MOSFET based on a tradeoff between the conduction
loss and switching loss. For the top side MOSFET, FOM is defined as the product of a MOSFET's on-resistance,
R
DS(ON)
, and the gate-to-drain charge, Q
GD
. For the bottom side MOSFET, FOM is defined as the product of the
MOSFET's on-resistance, R
DS(ON)
, and the total gate charge, Q
G
.
FOM
top
= R
DS(on)
x Q
GD
; FOM
bottom
= R
DS(on)
x Q
G
(8)
The lower the FOM value, the lower the total power loss. Usually lower R
DS(ON)
has higher cost with the same
package size.
The top-side MOSFET loss includes conduction loss and switching loss. It is a function of duty cycle
(D=V
OUT
/V
IN
), charging current (I
CHG
), MOSFET's on-resistance (R
DS(ON)
), input voltage (V
IN
), switching frequency
(f
S
), turn on time (t
on
) and turn off time (t
off
):
(9)
The first item represents the conduction loss. Usually MOSFET R
DS(ON)
increases by 50% with 100°C junction
temperature rise. The second term represents the switching loss. The MOSFET turn-on and turn-off times are
given by:
(10)
where Q
sw
is the switching charge, I
on
is the turn-on gate driving current and I
off
is the turn-off gate driving
current. If the switching charge is not given in MOSFET datasheet, it can be estimated by gate-to-drain charge
(Q
GD
) and gate-to-source charge (Q
GS
):
(11)
Gate driving current can be estimated by REGN voltage (V
REGN
), MOSFET plateau voltage (V
plt
), total turn-on
gate resistance (R
on
) and turn-off gate resistance (R
off
) of the gate driver:
(12)
The conduction loss of the bottom-side MOSFET is calculated with the following equation when it operates in
synchronous continuous conduction mode:
P
bottom
= (1 - D) x I
CHG
2
x R
DS(on)
(13)
When charger operates in non-synchronous mode, the bottom-side MOSFET is off. As a result all the
freewheeling current goes through the body-diode of the bottom-side MOSFET. The body diode power loss
depends on its forward voltage drop (V
F
), non-synchronous mode charging current (I
NONSYNC
), and duty cycle (D).
P
D
= V
F
x I
NONSYNC
x (1 - D) (14)
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