Datasheet

Not Recommended for New Designs
bq24725
www.ti.com SLUS702A –JULY 2010–REVISED NOVEMBER 2010
The rising edge delay default is 150ms after ACDET has a valid voltage to make ACOK pull high. The first time
after IC POR always gives a 150ms ACOK rising edge delay no matter what the ChargeOption register value. To
change this option, the VCC pin voltage must above UVLO, and the ACDET pin voltage must above 0.6V which
enables the IC SMBus communication and sets ChargeOption() bit[15] to 1 which sets the ACOK rising deglitch
time to be 1.3s. Only after the ACDET pin voltage is pulled below 2.4V (but not below 0.6V which will reset IC
and force the ACOK rising edge deglitch time to be 150ms) and ACDRV has been turned off at least one time,
the 1.3s delay time is effective for next time the ACDET pin voltage goes above 2.4V. The purpose of the option
1.3s rising edge deglitch time is to turn off the ACFET long enough when the ACDET pin is pulled below 2.4V by
excessive system current, such as over current or short circuit.
Adapter Over Voltage (ACOVP)
When the ACDET pin voltage is higher than 3.15V, it is considered as adapter over voltage. ACOK will be pulled
low, and charge will be disabled. ACFET will be turned off to disconnect the high voltage adapter to system
during ACOVP. BATFET will be turned on if turns on conditions are valid. See the System Power Selection
section for details.
When ACDET pin voltage falls below 3.15V and above 2.4V, it is considered as adapter voltage returns back to
normal voltage. ACOK will be pulled high by external pull up resistor. BATFET will be turned off and ACFET and
RBFET will be turned on to power the system from adapter. The charge can be resumed if enable charge
conditions are valid. See the Enable and Disable Charging section for details.
System Power Selection
The bq24725 automatically switches adapter or battery power to system. The battery is connected to system at
POR if battery exists. The battery is disconnected from system and the adapter is connected to system after
default 150ms delay (can be change to 1.3s delay) if ACOK goes HIGH. An automatic break-before-make logic
prevents shoot-through currents when the selectors switch.
The ACDRV drives a pair of common-source (CMSRC) n-channel power MOSFETs (ACFET and RBFET)
between adapter and ACP (see Figure 1 for details). The ACFET separates adapter from battery or system, and
provides a limited di/dt when plugging in adapter by controlling the ACFET turn-on time. Meanwhile it protects
adapter when system or battery is shorted. The RBFET provides negative input voltage protection and battery
discharge protection when adapter is shorted to ground, and minimizes system power dissipation with its low
R
DS(on)
compared to a Schottky diode.
When the adapter is not present, ACDRV is pulled to CMSRC to keep ACFET and RBFET off, disconnecting
adapter from system. BATDRV stays at V
SRN
+ 6V to connect battery to system if all the following conditions are
valid:
• V
VCC
> UVLO;
• V
SRN
> UVLO;
• V
ACN
< 200mV above V
SRN
(ACN_SRN comparator);
Approximately 150ms (default, can be changed to 1.3s) after the adapter is detected (ACDET pin voltage
between 2.4V and 3.15V), the system power source begins to switch from battery to adapter if all the following
conditions are valid:
• Not in LEARN mode or in LEARN mode and V
SRN
is lower than battery depletion threshold;
• ACOK high
The gate drive voltage on ACFET and RBFET is V
CMSRC
+ 6V. If the ACFET/RBFET have been turned on for
20ms, and the voltage across gate and source is still less than 5.9V, ACFET and RBFET will be turned off. After
1.3s delay, it resumes turning on ACFET and RBFET. If such a failure is detected seven times within 90
seconds, ACFET/RBFET will be latched off and an adapter removal and system shut down is required to force
ACDET < 0.6V to reset the IC. After IC reset from latch off, ACFET/RBFET can be turned on again. After 90
seconds, the failure counter will be reset to zero to prevent latch off. With ACFET/RBFET off, charge is disabled.
To turn off ACFET/RBFET, one of the following conditions must be valid:
• In LEARN mode and V
SRN
is above battery depletion threshold;
• ACOK low
To limit the in-rush current on ACDRV pin, CMSRC pin and BATDRV pin, a 4kΩ resistor is recommended on
each of the three pins.
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