Datasheet

UVLO
WAKEUP
3.75V
0.6V
EN_REGN
2.4V
ACOK_DRV
20X
VREF_IAC
20X
VREF_ICHG
VREF_VREG
FBO EAI
EAO
RAMP
Frequency
**
200mV
4mA in
BATOVP
SMBus Interface
ChargeOption()
ChargeCurrent()
ChargeVoltage()
InputCurrent()
ManufactureID()
DeviceID()
15
14
19
18
17
7
13
12
5
6
20
2
1
DAC_VALID
CHARGE_INHIBIT
8
9
3.15V
ACOVP
3
CMSRC+6V
10uA
REGN
LDO
REGN
LDO
VFB
BATOVP
VFB
104%VREF_VREG
VCC
SRN+275mV
VCC-SRN
CHG_UCP
5mV
SRP-SRN
CHG_OCP
SRP-SRN
60mV/90mV/120mV
BAT_LOWV
2.5V
SRN
TSHUT
Tj
155 C
o
REFRESH
4.3V
BTST-PH
1X
10
VCC
ACDET
ACOK
IOUT
ACP
ACN
ILIM
SRP
SRN
SDA
SCL
GND
LODRV
REGN
PHASE
HIDRV
BTST
CMSRC
ACDRV
**
Threshold or deglitch time is adjustable by ChargeOption ()
Type III
Compensation
ACGOOD
VCC_SRN
CE
ILIM
ACN-SRN
105mV
WATCHDOG
TIMEOUT
EN_REGN
EN_CHRG
HSON
LSON
Driver Logic
IFAULT_HI
ACP-PH
700mV
**
ACOC
ACP-ACN
1.66xVREF_IAC
**
MUX
ACOK_DRV
4
ACDRV
CHARGE
PUMP
ACDRV
CHARGE
PUMP
150ms rising deglitch**
IFAULT_LOPH-GND
110mV
LIGHT_LOAD
1.25mV
SRP-SRN
PWM
WATCHDOG
TIMER
175s **
DAC_VALID
CHARGE_INHIBIT
ACOK_DRV
ACDRV
CMSRC+5.9V
ACDRV-CMSRC
16
ACN
SRN+200mV
Selector
Logic
LEARN
ACOC
Latch off
Latch off
SRN
BATDEPL
71%
** of
VREF_VREG
LEARN
VREF_VREG
VREF_ICHG
VREF_IAC
IOUT_SEL
IOUT_SEL
SRN+6V
BATDRV
11
BATDRV
CHARGE
PUMP
BATDRV
CHARGE
PUMP
SRN
FAST_DPM
ACP-ACN
1.08xVREF_IAC
WAKEUP
Not Recommended for New Designs
bq24725
SLUS702A JULY 2010REVISED NOVEMBER 2010
www.ti.com
FUNCTIONAL BLOCK DIAGRAM
Figure 16. Functional Block Diagram for bq24725
14 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated
Product Folder Links :bq24725