Datasheet

R
AC
To ACP
To ACN
SystemPathPCB Trace
Systemcurrent
Chargerinputcurrent
ChargerInputPCB Trace
ACP ACN
R
AC
Charger
R
PCB
I
CHRGIN
I
BAT
I
SYS
I
DPM
(a)PCBLayout (b)EquivalentCircuit
To ACP To ACN
Systemcurrent
Chargerinputcurrent
SinglepointconnectionatR
AC
SystemPathPCB Trace
ChargerInputPCB Trace
R
AC
ACP ACN
Charger
R
AC
R
PCB
I
CHRGIN
I
BAT
I
SYS
I
DPM
(a)PCBLayout (b)EquivalentCircuit
bq24725A
www.ti.com SLUSAL0 –SEPTEMBER 2011
To prevent unintentional charger shut down in normal operation, MOSFET R
DS(on)
selection and PCB layout is
very important. Figure 21 shows a improvement PCB layout example and its equivalent circuit. In this layout, the
system current path and charger input current path is not separated, as a result, the system current causes
voltage drop in the PCB copper and is sensed by the IC. The worst layout is when a system current pull point is
after charger input; as a result all system current voltage drops are counted into over current protection
comparator. The worst case for IC is when the total system current and charger input current sum equals the
DPM current. When the system pulls more current, the charger IC tries to regulate the R
AC
current as a constant
current by reducing the charging current.
Figure 21. Need improve PCB layout example.
Figure 22 shows the optimized PCB layout example. The system current path and charge input current path is
separated, as a result the IC only senses charger input current caused PCB voltage drop and minimized the
possibility of unintentional charger shut down in normal operation. This also makes PCB layout easier for high
system current application.
Figure 22. Optimized PCB layout example.
The total voltage drop sensed by IC can be express as the following equation.
V
top
= R
AC
x I
DPM
+ R
PCB
x (I
CHRGIN
+ (I
DPM
- I
CHRGIN
) x k) + R
DS(on)
x I
PEAK
(15)
where the R
AC
is the AC adapter current sensing resistance, I
DPM
is the DPM current set point, R
PCB
is the PCB
trace equivalent resistance, I
CHRGIN
is the charger input current, k is the PCB factor, R
DS(on)
is the high side
MOSFET turn on resistance and I
PEAK
is the peak current of inductor. Here the PCB factor k equals 0 means the
best layout shown in Figure 22 where the PCB trace only goes through charger input current while k equals 1
means the worst layout shown in Figure 21 where the PCB trace goes through all the DPM current. The total
voltage drop must below the high side short circuit protection threshold to prevent unintentional charger shut
down in normal operation.
The low side MOSFET short circuit voltage drop threshold can be adjusted via SMBus command.
ChargeOption() bit[7] =0, 1 set the low side threshold 135mV and 230mV respectively. The high side MOSFET
short circuit voltage drop threshold can be adjusted via SMBus command. ChargeOption() bit[8] = 0, 1 disable
the function and set the threshold 750mV respectively. For a fixed PCB layout, host should set proper short
circuit protection threshold level to prevent unintentional charger shut down in normal operation.
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