Datasheet

bq24650
SLUSA75 JULY 2010
www.ti.com
ELECTRICAL CHARACTERISTICS
5.0V V
VCC
28V, –40°C < T
J
+ 125°C, typical values are at T
A
= 25°C, with respect to GND (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
OPERATING CONDITIONS
V
VCC_OP
VCC input voltage operating range 5 28 V
QUIESCENT CURRENTS
Total battery discharge current (sum of
currents into VCC, BTST, PH, SRP, SRN, VCC < VBAT, VCC > V
UVLO
(SLEEP) 15 µA
VFB), VFB 2.1V
I
BAT
VCC > VBAT, VCC > V
UVLO
, CE = LOW 5 µA
Battery discharge current (sum of currents
into BTST, PH, SRP, SRN, VFB), VFB
VCC > VBAT, VCC > V
VCCLOWV
,
5 µA
2.1V
CE = HIGH, Charge done
VCC > VBAT, VCC > V
UVLO
, CE = LOW 0.7 1 mA
VCC > VBAT, VCC > V
VCCLOWV
,
Adapter supply current (sum of current into 2 3 mA
I
AC
CE = HIGH, charge done
VCC pin)
VCC > VBAT, VCC > V
VCCLOWV
,
25 mA
CE = HIGH, Charging, Qg_total = 10nC [1]
CHARGE VOLTAGE REGULATION
V
REG
Feedback regulation voltage 2.1 V
T
J
= 0°C to 85°C –0.5% 0.5%
Charge voltage regulation accuracy
T
J
= –40°C to 125°C -0.7% 0.7%
I
VFB
Leakage current into VFB pin VFB = 2.1 V 100 nA
CURRENT REGULATION – FAST CHARGE
V
IREG_CHG
SRP-SRN current sense voltage range V
IREG_CHG
= V
SRP
– V
SRN
40 mV
Charge current regulation accuracy V
IREG_CHG
= 40 mV –3% 3%
CURRENT REGULATION – PRE-CHARGE
V
PRECHG
Precharge current sense voltage range V
IREG_PRCHG
= V
SRP
– V
SRN
4 mV
Precharge current regulation accuracy V
IREG_PRECH
= 4 mV –25% 25%
CHARGE TERMINATION
V
TERMCHG
Termination current sense voltage range V
ITERM
= V
SRP
– V
SRN
4 mV
Termination current accuracy V
ITERM
= 4 mV –25% 25%
Deglitch time for termination (both edges) 100 ms
t
QUAL
Termination qualification time V
BAT
> V
RECH
and I
CHG
< I
TERM
250 ms
I
QUAL
Termination qualification current Discharge current once termination is detected 2 mA
INPUT VOLTAGE REGULATION
V
MPPSET
MPPSET regulation voltage 1.2 V
Input voltage regulation accuracy –0.6% 0.6%
I
MPPSET
Leakage current into MPPSET pin V
MPPSET
= 7 V, T
A
= 0 – 85°C 1 µA
V
MPPSET_CD
MPPSET shorted to disable charge 75 mV
V
MPPSET_CE
MPPSET released to enable charge 175 mV
INPUT UNDER-VOLTAGE LOCK-OUT COMPARATOR (UVLO)
V
UVLO
AC under-voltage rising threshold Measure on VCC 3.65 3.85 4 V
V
UVLO_HYS
AC under-voltage hysteresis, falling 350 mV
VCC LOWV COMPARATOR
V
VCC LOWV_fall
Falling threshold, disable charge Measure on VCC 4.1 V
V
VCC LOWV_rise
Rising threshold, resume charge 4.35 V
SLEEP COMPARATOR (REVERSE DISCHARGING PROTECTION)
V
SLEEP _FALL
SLEEP falling threshold V
VCC
– V
SRN
to enter SLEEP 40 100 150 mV
V
SLEEP_HYS
SLEEP hysteresis 500 mV
SLEEP rising shutdown deglitch VCC falling below SRN 100 ms
VCC rising above SRN, Delay to exit SLEEP
SLEEP falling powerup deglitch 30 ms
mode
4 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): bq24650