Datasheet

top DS(on) GD bottom DS(ON) G
FOM R Q ; FOM R Q= ´ = ´
2
top CHG DS(ON) IN CHG on off
1
P D I R V I (t t ) F
2
= ´ ´ + ´ ´ ´ + ´
SW SW
on off
on off
Q Q
t ; t
I I
= =
SW GD GS
1
Q Q Q
2
= + ´
REGN plt plt
on off
on off
V V V
I ; I
R R
-
= =
2
bottom CHG DS(ON)
P (1 D) I R= - ´ ´
ICLOSS_Driver IN g_total s
P V fQ= ´ ´
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SLUSA75 –JULY 2010 www.ti.com
Figure-of-merit (FOM) is usually used for selecting a proper MOSFET based on a tradeoff between conduction
loss and switching loss. For a top-side MOSFET, FOM is defined as the product of the MOSFET's on-resistance,
R
DS(on)
, and the gate-to-drain charge, Q
GD
. For a bottom-side MOSFET, FOM is defined as the product of the
MOSFET's on-resistance, R
DS(on)
, and the total gate charge, Q
G
.
(16)
The lower the FOM value, the lower the total power loss. Usually a lower R
DS(on)
has a higher cost with the same
package size.
Top-side MOSFET loss includes conduction loss and switching loss. It is a function of duty cycle (D = V
OUT
/V
IN
),
charging current (I
CHG
), the MOSFET's on-resistance R
DS(on)
, input voltage (V
IN
), switching frequency (F), turn-on
time (t
on
) and turn-off time (t
off
):
(17)
The first item represents the conduction loss. Usually MOSFET R
DS(ON)
increases by 50% with 100°C junction
temperature rise. The second term represents switching loss. The MOSFET turn-on and turn-off times are given
by:
(18)
where Q
SW
is the switching charge, I
on
is the turn-on gate driving current, and I
off
is the turn-off gate driving
current. If the switching charge is not given in the MOSFET datasheet, it can be estimated by gate-to-drain
charge (Q
GD
) and gate-to-source charge (Q
GS
):
(19)
The gate driving current total can be estimated by the REGN voltage (V
REGN
), MOSFET plateau voltage (V
PLT
),
total turn-on gate resistance (R
on
), and turn-off gate resistance (R
off
) of the gate driver:
(20)
The conduction loss of the bottom-side MOSFET is calculated with the following equation when it operates in
synchronous continuous conduction mode:
(21)
If the SRP-SRN voltage decreases below 5mV (the charger is also forced into non-synchronous mode when the
average SRP-SRN voltage is lower than 1.25mV), the low-side FET is turned off for the remainder of the
switching cycle to prevent negative inductor current.
As a result, all of the freewheeling current goes through the body diode of the bottom-side MOSFET. The
maximum charging current in non-synchronous mode can be up to 0.9A (0.5A typ) for a 10-mΩ charging current
sensing resistor, considering the IC tolerance. Choose a bottom-side MOSFET with either an internal Schottky or
body diode capable of carrying the maximum non-synchronous mode charging current.
MOSFET gate driver power loss contributes to dominant losses on the controller IC, when the buck converter is
switching. Choosing a MOSFET with a small Q
g_total
reduces power loss to avoid thermal shutdown.
(22)
Where Q
g_total
is the total gate charge for both the upper and lower MOSFETs at 6V V
REGN
.
INPUT FILTER DESIGN
During adapter hot plug-in, the parasitic inductance and the input capacitor from the adapter cable form a second
order system. The voltage spike at the VCC pin may be beyond the IC maximum voltage rating and damage the
IC. The input filter must be carefully designed and tested to prevent an over-voltage event on the VCC pin.
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