Datasheet

VCC
BTST
HIDRV
PH
REGN
LODRV
GND
TS
VFB
SRP
6V LDO
V(SRP-SRN)
COMP
ERROR
AMPLIFIER
20 uA
1V
2.1 V
0.8V
SRN
STATE
MACHINE
LOGIC
BATTERY
DETECTION
LOGIC
VCC
PH
4V
+
_
BTST
REFRESH
CE
145 C°
IC Tj
TSHUT
SRN+100 mV
VCC
SLEEP
LEVEL
SHIFTER
+
-
+
-
+
-
+
-
+
-
V(SRP-SRN)
CHG_OCP
+
-
200% X IBAT _REG
SYNCH
SRP-SRN
IBAT_ REG
0.8V
0.8V
10
5
mV
20X
VFB
BAT_OVP
+
-
104% X 2.1V
LTF
+
-
HTF
VREF
TCO
+
-
+
-
SUSPEND
VCC
ACOV
+
-
32V
CE
VREF
STAT1
STAT1
3.3V
LDO
VCC
VFB
LOWV
+
-
RCHRG
+
-
1.5V
+
-
2.05V
VFB
LOWV
RCHRG
TERM
+
-
V(SRP - SRN)
TERM
TERMINATE CHARGE
+
-
bq24650
+
-
+
-
UVLO
V
UVLO
VCC
SLEEP
UVLO
PWM
CONTROL
LOGIC
+
-
PWM
+
-
+
-
+
-
STAT 2
+
-
CHARGE
20uA
DISCHARGE
CHARGE
8 mA
BAT_OVP
VOLTAGE
REFERENCE
VREF
0.8V
10
STAT2
30 Minute
Precharge
Timer
FAULT
FAULT
2 mA
DISCHARGE
MPPSET
1.2 V
+
-
175 mV
+
-
TERM_EN
FBO
EAI
EAO
bq24650
www.ti.com SLUSA75 –JULY 2010
BLOCK DIAGRAM
Figure 15. Functional Block Diagram
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