Datasheet

VCC
ACDRV
BATDRV
BTST
HIDRV
PH
REGN
LODRV
GND
TS
bq24630
CE
ACP
ACN
VFB
SRP
6 VLDO
V(ACP-ACN)
+
-
V(SRP-SRN)
COMP
ERROR
AMPLIFIER
1V
1.8 V
IBAT_ REG
SRN
VCC
VCC- 6 V
REG
STATE
MACHINE
LOGIC
BATTERY
DETECTION
LOGIC
VCC
PH
4.2V
+
_
BTST
REFRESH
SYSTEM
POWER
SELECTOR
LOGIC
CE
145°C
IC Tj
TSHUT
SRN+100 mV
VCC
SLEEP
LEVEL
SHIFTER
ACN
+
-
+
-
+
-
+
-
+
-
+
-
V(SRP-SRN)
CHG_OCP
+
-
160% XIBAT_REG
SYNCH
SRP- SRN
ISET1
ISET2
ACSET
IBAT_ REG
ISET1
ISET1
8
5mV
20X
BAT
BAT_OVP
+
-
108% XVBAT_REG
LTF
+
-
HTF
VREF
TCO
+
-
+
-
SUSPEND
VCC
ACOV
+
-
V
ACOV
VREF
STAT1
STAT1
20X
STAT2
STAT2
3.3 V
LDO
VCC
VFB
LOWV
+
-
RCHRG
+
-
0.35V
+
-
1.675V
VFB
RCHRG
TERM
+
-
ISET2
TERM
TERMINATECHARGE
+
-
bq24630
+
-
+
-
UVLO
V
UVLO
VCC
SLEEP
UVLO
VCC- 6 V
VCC- 6 V
ACN- 6 V
VCC- 6 V
REG
ACN
ACN-6 V
ACOV
PWM
CONTROL
LOGIC
+
-
PWM
+
-
+
-
+
-
PG
PG
+
-
CHARGE
20 mA
DISCHARGE
DISCHARGE
OR
CHARGE
8 mA
BAT_OVP
+
-
DISABLE
TMR/TERM
0.4 V
TTC
VOLTAGE
REFERENCE
VREF
ACN- SRN
SRN+200 mV
+
-
ACN
Safety Timer
30 minute
Precharge
timer
TTC
FAULT
2 mA
FAULT
1 M
TTC
+
-
+
-
WARM
COOL
COOL
WARM
20 mA
CE
1.25mV
100XV(SRP -SRN)
bq24630
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SLUS894A JANUARY 2010 REVISED OCTOBER 2011
BLOCK DIAGRAM
Figure 16. Functional Block Diagram of bq24630
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