Datasheet

High
Frequency
Current
Path
L1
R1
C3
C1
C2
PGND
SW
V
BAT
BAT
V
IN
CurrentDirection
ToSRP -SRNpinor ACP - ACNpin
R
SNS
CurrentSensingDirection
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SLUSA49B –APRIL 2010– REVISED OCTOBER 2011 www.ti.com
7. Route the analog ground separately from the power ground and use a single ground connection to tie the
charger power ground to the charger analog ground. Just beneath the IC, use the copper pour for analog
ground, but avoid the power pins to reduce inductive and capacitive noise coupling. Connect the analog
ground to GND. Connect the analog ground and power ground together using the thermal pad as the single
ground-connection point. Or use a 0-Ω resistor to tie analog ground to power ground (the thermal pad should
tie to analog ground in this case). A star connection under the thermal pad is highly recommended.
8. It is critical that the exposed thermal pad on the back side of the IC package be soldered to the PCB ground.
Ensure that there are sufficient thermal vias directly under the IC, connecting to the ground plane on the
other layers.
9. Decoupling capacitors should be placed next to the IC pins. Make trace connections as short as possible.
10. All via sizes and numbers should be adequate for a given current path.
Figure 21. High-Frequency Current Path
Figure 22. Sensing-Resistor PCB Layout
See the EVM design (SLUU396) for the recommended component placement with trace and via locations.
For the QFN information, see SCBA017 and SLUA271.
SPACE
SPACE
REVISION HISTORY
Changes from Revision A (May 2010) to Revision B Page
• Changed descriptions of PH and BTST pins ...................................................................................................................... 13
• Added added text, equations and illustrations from Inductor Selection to PCB Layout ..................................................... 27
• Corrected equation for caclulating voltage ripple on output capacitor ................................................................................ 27
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