Datasheet

bq24272
www.ti.com SLUSB09 –JUNE 2012
ELECTRICAL CHARACTERISTICS (continued)
Circuit of , V
UVLO
< V
IN
< V
OVP
AND V
IN
>V
BAT
+V
SLP
, T
J
= 0°C – 125°C and T
J
= 25°C for typical values (unless otherwise
noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Battery detection current before charge done (sink
I
DETECT
2.5 mA
current)
t
DETECT
Battery detection time 250 ms
V
IH(CD)
CD input high logic level 1.3 V
V
IL(CD)
CD input low logic level 0.4 V
INPUT PROTECTION
I
INLIM
= 1.5 A 1.35 1.5 1.65
I
INLIM
Input current limit VIN=5V, DC current pulled from SW A
I
INLIM
= 2.5 A 2.3 2.5 2.8
Input DPM threshold 4.2 4.76 V
V
IN_DPM
Input DPM accuracy –2% 2%
V
DRV
Internal bias regulator voltage 5 5.2 5.45 V
I
DRV
DRV Output current 10 mA
V
DO_DRV
DRV Dropout voltage (V
IN
– V
DRV
) I
IN
= 1A, V
IN
= 5V, I
DRV
= 10mA 450 mV
V
UVLO
IC active threshold voltage V
IN
rising, 150 mV hysteresis 3.6 3.8 4.0 V
V
SLP
Sleep-mode entry threshold, V
IN
-V
BAT
2.0 V ≤ V
BAT
≤ V
OREG
, V
IN
falling 0 40 100 mV
V
SLP_EXIT
Sleep-mode exit hysteresis 2.0 V ≤ V
BAT
≤ V
OREG
40 100 160 mV
Deglitch time for supply rising above V
SLP
+V
SLP_EXIT
Rising voltage, 2-mV over drive, t
RISE
=100ns 30 ms
V
OVP
Input supply OVP threshold voltage IN, V
IN
Rising, 100 mV hysteresis 10.3 10.5 10.7 V
1.025 × 1.05 × 1.075 ×
V
BOVP
Battery OVP threshold voltage V
BAT
threshold over V
OREG
to turn off charger during charge V
V
BATREG
V
BATREG
V
BATREG
% of
V
BOVP
hysteresis Lower limit for V
BAT
falling from above V
BOVP
1
V
BATREG
V
BATUVLO
Battery UVLO threshold voltage 2.5 V
V
IN_DPM
–
V
BAT_SOURCE
Bad source detection threshold V
80mV
Bad source detection deglitch 32 ms
I
LIMIT
Cycle by cycle current limit 4.1 4.9 5.6 A
T
SHUTDWN
Thermal shutdown 10°C Hysteresis 165 C
T
REG
Thermal regulation threshold 120 C
Safety timer accuracy –20% 20%
STAT, INT
I
IH
High-level leakage current V
/CHG
= V
/PG
= 5 V 1 µA
V
OL
Low-level output saturation voltage IO = 10 mA, sink current 0.4 V
PWM CONVERTER
Internal top reverse blocking MOSFET on-resistance I
IN_LIMIT
= 1.5 A, Measured from V
IN
to PMIDU 45 80 mΩ
Internal top N-channel Switching MOSFET on-
Measured from PMID to SW 65 110 mΩ
resistance
Internal bottom N-channel MOSFET on-resistance Measured from SW to PGND 65 115 mΩ
f
OSC
Oscillator frequency 1.35 1.50 1.65 MHz
D
MAX
Maximum duty cycle 95%
D
MIN
Minimum duty cycle 0
BATTERY-PACK NTC MONITOR
V
HOT
High temperature threshold V
TS
falling, 1%V
DRV
Hysteresis 29.7 30 30.5 %VDRV
V
COLD
Low temperature threshold V
TS
rising, 1%V
DRV
Hysteresis 59.5 60 60.4 %VDRV
TS
OFF
TS Disable threshold V
TS
rising, 2%V
DRV
Hysteresis 70 73 %VDRV
t
DGL(TS)
Deglitch time on TS change 50 ms
V
IH
Input high threshold V
PULLUP
= 1.8 V, SDA and SCL 1.3 V
V
IL
Input low threshold V
PULLUP
= 1.8 V, SDA and SCL 0.4 V
V
OL
Output low threshold I
SDA
= 10 mA, sink current 0.4 V
I
IH
Input high leakage current V
PULLUP
= 1.8 V, SDA and SCL 1 µA
t
WATCHDOG
Watchdog timer timeout 30 s
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