Datasheet
STAT
SCL
SDA
VBUS
PMID
REGN
PGND
PGND
SYS
SYS
OTG
INT
4
5
6
7 8 9
15
16
17
18
2223
24
1
2
3
BAT
BAT
13
14
BTST
SW
SW
1920
21
10 11 12
VBUS
D+
D–
ILIM
TS1
TS2
bq24190
CE
STAT
SCL
SDA
VBUS
PMID
REGN
PGND
PGND
SYS
SYS
OTG
INT
4
5
6
7
8 9
15
16
17
18
22
23
24
1
2
3
BAT
BAT
13
14
BTST
SW
SW
1920
21
10
11 12
VBUS
PSEL
PG
ILIM
TS1
TS2
bq24192
bq24192I
bq24193
CE
bq24190, bq24192
bq24192I, bq24193
www.ti.com
SLUSAW5A –JANUARY 2012–REVISED OCTOBER 2012
PINOUTS
PIN FUNCTIONS
PIN
TYPE DESCRIPTION
NAME NO.
VBUS 1,24 P Charger Input Voltage. The internal n-channel reverse block MOSFET (RBFET) is connected between VBUS and PMID
with VBUS on source. Place a 1µF ceramic capacitor from VBUS to PGND and place it as close as possible to IC. (Refer
to Application Information Section for details)
D+ 2 I Positive line of the USB data line pair. D+/D– based USB host/charging port detection. The detection includes data
contact detection (DCD) and primary detection in bc1.2.
(bq24190) Analog
PSEL – I Power source selection input. High indicates a USB host source and Low indicates an adapter source.
(bq24192 Digital
bq24192I
bq24193)
D– 3 I Negative line of the USB data line pair. D+/D– based USB host/charging port detection. The detection includes data
contact detection (DCD) and primary detection in bc1.2.
(bq24190) Analog
PG – O Open drain active low power good indicator. Connect to the pull up rail via 10kohm resistor. LOW indicates a good input
source if the input voltage is between UVLO and ACOV, above SLEEP mode threshold, and current limit is above 30mA.
(bq24192 Digital
bq24192I
bq24193)
STAT 4 O Open drain charge status output to indicate various charger operation. Connect to the pull up rail via 10kohm. LOW
indicates charge in progress. HIGH indicates charge complete or charge disabled. When any fault condition occurs, STAT
Digital
pin in bq24190, bq24192, bq24193 blinks at 1Hz, and STAT pin in bq24192I has a 10kΩ resistor to ground.
SCL 5 I
I
2
C Interface clock. Connect SCL to the logic rail through a 10kΩ resistor.
Digital
SDA 6 I/O
I
2
C Interface data. Connect SDA to the logic rail through a 10kΩ resistor.
Digital
INT 7 O Open-drain Interrupt Output. Connect the INT to a logic rail via 10kΩ resistor. The INT pin sends active low, 256us pulse
to host to report charger device status and fault.
Digital
OTG 8 I USB current limit selection pin during buck mode, and active high enable pin during boost mode.
Digital
In buck mode with USB host (PSEL=High), when OTG = High, IIN limit = 500mA and when OTG = Low, IIN limit =
100mA.
The boost mode is activated when the REG01[5:4]=10 and OTG pin is High.
CE 9 I Active low Charge Enable pin. Battery charging is enabled when REG01[5:4]=01 and CE pin = Low. CE pin must be
pulled high or low.
Digital
ILIM 10 I ILIM pin sets the maximum input current limit by regulating the ILIM voltage at 1V. A resistor is connected from ILIM pin to
ground to set the maximum limit as I
INMAX
= (1V/R
ILIM
) × 530. The actual input current limit is the lower one set by ILIM
Analog
and by I
2
C REG00[2:0]. The minimum input current programmed on ILIM pin is 500mA.
Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: bq24190 bq24192 bq24192I bq24193