Datasheet

Recognize START or
REPRATED START
Condition
Generate
ignal
ACKNOWLEDGE
S
Recognize STOP or
REPRATED START
Condition
SDA
SCL
MSB
Acknowledgment
Signal From Slave
Address
R/W
ACK
ACK
S
or
Sr
Sr
or
P
Sr
P
Clock Line Held Low While
Interrupts are Serviced
Data Output
by Transmitter
Data Output
by Receiver
SCL From
Master
START
Condition
Clock Pulse for
Acknowledgement
Acknowledge
Not Acknowledge
S
1 2 8 9
bq24160, bq24160A
bq24161, bq24161B
bq24163, bq24168
www.ti.com SLUSAO0E –NOVEMBER 2011–REVISED NOVEMBER 2013
Figure 30. Acknowledge on the I2C Bus
Figure 31. Bus Protocol
Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 27
Product Folder Links: bq24160 bq24160A bq24161 bq24161B bq24163 bq24168