Datasheet
www.ti.com
Test Summary
Jump Default Factory
IC Description
er Setting
1-2: IUSB1 = HI
2-3: IUSB1 = LO
All JP5 1-2 (IUSB1 = HI)
See data sheet Table 1 for description of USB input current limit and VINDPM threshold
setting. Default setting is for 500-mA input current limit and 4.68-V threshold.
1-2 (CE2 = HI): Active-low enable for charging at half current (if CE1 = LO) or
suspended charging (if CE1 = HI)
bq24165 JP6 2-3 (CE2 = LO)
2-3 (CE2 = LO): Active-low enable for full current charging (if CE1 = LO) or reduced
VBAT voltage (if CE1 = HI)
1-2 (TS = EXT or TS floating): Connects the TS pin to an external thermistor. The
resistor divider formed by R1 and R3 has been sized to accommodate a 10-kΩ
bq24166 thermistor. If a different thermistor is used, R1 and R3 need to be resized.
JP6 2-3 (TS = INT)
bq24167 2-3 (TS = NT): Connects a potentiometer to the TS so the potentiometer can emulate a
thermistor. The potentiometer has been preset to approximately 3.4 kΩ so that the TS
voltage is 0.5 x V(DRV).
1.7 Recommended Operating Conditions
Min Typ Max Unit
Supply voltage, V
IN
Operating input voltage from ac adapter 4.2 10 V
USB voltage, V
USB
Operating input voltage from USB or equivalent supply 4.2 6 V
Battery voltage, V
BAT
Voltage applied at VBAT terminal (depends on status of CE1 4.02 4.2 4.24 V
and CE2)
System voltage, V
SYS
Voltage output at SYS terminal (depends on VBAT voltage 3.4 4.37 V
and status of V
INDPM
)
Supply current, I
IN(MAX)
Maximum input current limit for ac adapter input (set by 1.5 2.5 A
user-selectable resistor)
Supply current, I
USB(MAX)
Maximum input current limit for USB input (set by USBx 0.1 0.5 1.5 A
input pins)
Charge current, I
chrg
Battery charge current 0.550 2.5 A
Operating junction temperature range, T
J
0 125 °C
2 Test Summary
This procedure describes one test configuration of the HPA720 evaluation board for bench evaluation. An
electronic load is used to simulate a battery.
2.1 Definitions
The following naming conventions are followed.
VXXX : External voltage supply name (VADP, VBT, VSBT)
LOADW: External load name (LOADR, LOADI)
V(TPyyy): Voltage at internal test point TPyyy. For example, V(TP12) means the voltage at
TP12.
V(Jxx): Voltage at header Jxx
V(TP(XXX)): Voltage at test point XXX. For example, V(ACDET) means the voltage at the test
point which is marked as ACDET.
V(XXX, YYY): Voltage across point XXX and YYY.
I(JXX(YYY)): Current going out from the YYY terminal of header XX.
Jxx(BBB): Terminal or pin BBB of header xx
JPx ON : Internal jumper Jxx terminals are shorted.
JPx OFF: Internal jumper Jxx terminals are open.
JPx (-YY-) ON: Internal jumper Jxx adjacent terminals marked as YY are shorted.
5
SLUU669–January 2012 QFN-Packaged bq24165/166/167EVM-720 Evaluation Modules
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated