Datasheet

OUT OUT
1
=
o
2 L C
f
p ´ ´
bq24155
SLUS942 –FEBRUARY 2010 www.ti.com
Charge Status Output, STAT Pin
The STAT pin is used to indicate operation conditions for bq24155. STAT is pulled low during charging when
EN_STAT bit in control register (00H) is set to "1". Under other conditions, the STAT pin acts as a high
impedance (open-drain) output. Under fault conditions, a 128-ms pulse is sent out to notify the host. The status of
STAT pin at different operation conditions is summarized in Table 1. The STAT pin can be used to drive an LED
or communicate to the host processor.
Table 1. STAT Pin Summary
CHARGE STATE STAT
Charge in progress and EN_STAT = 1 Low
Other normal conditions Open-drain
Charge mode faults: Timer fault, sleep mode, VBUS 128-ms pulse, then open-drain
or battery overvoltage, poor input source, VBUS
UVLO, no battery, thermal shutdown
Control Bits in Charge Mode
CE Bit (Charge Mode)
The bit of CE in control register is used to disable or enable the charge process. A low logic level (0) on this bit
enables the charge and a high logic level (1) disables the charge.
RESET Bit
The bit of RESET in control register is used to reset all the charge parameters. Writing '1" to RESET bit resets all
the charge parameters to default values and RESET bit is automatically cleared to zero once the charge
parameters are reset. It is designed for charge parameter reset before charge starts, and it is not recommended
to set the RESET bit when charging or boosting in progress.
OPA_Mode Bit
OPA_MODE is the operation mode control bit. When OPA_MODE = 0, the bq24155 operates as a charger if
HZ_MODE is set to "0", refer to Table 2 for detail.
Table 2. Operation Mode Summary
OPA_MODE HZ_MODE OPERATION MODE
0 0 Charge (no fault)
Charge configure (fault, V
bus
> V
UVLO
)
High impedance (V
bus
< V
UVLO
)
1 0 NA
X 1 High impedance
High Impedance Mode
When control bit of HZ-MODE is set to "1", the bq24155 operates in high impedance mode, with the impedance
in VBUS pin higher than 165 kΩ. In high impedance mode, a crude 32-second timer is enabled when the battery
voltage is below V
(LOWV)
to monitor the host control is available or not. If the crude 32 second timer expires, the
bq24155 operates in 32 minute mode and the crude 32 second timer is disabled. In 32 minute mode, when
VBUS is below UVLO, the bq24155 operates in high impedance mode regardless of the setting of the HZ_MODE
bit.
Output Inductor and Capacitance Selection Guidelines
The bq24155 provides internal loop compensation. With this scheme, the best stability occurs when the LC
resonant frequency, ƒ
o
, is approximately 40 kHz (20 kHz to 80 kHz). Equation 1 is used to calculate the value of
the output inductor, L
OUT
, and output capacitor, C
OUT
.
(1)
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