Datasheet

PCB Layout Considerations
bq24083
SLUS848A – MAY 2008 – REVISED APRIL 2009 .............................................................................................................................................................. www.ti.com
It is important to pay special attention to the PCB layout. The following provides some guidelines:
• To obtain optimal performance, the decoupling capacitor from V
CC
to V
(IN)
and the output filter capacitors from
OUT to V
SS
should be placed as close as possible to the device, with short trace runs to both signal and V
SS
pins. The V
SS
pin should have short trace runs to the GND pin.
• All low-current V
SS
connections should be kept separate from the high-current charge or discharge paths from
the battery. Use a single-point ground technique incorporating both the small-signal ground path and the
power ground path.
• The high-current charge paths into IN and from the OUT pins must be sized appropriately for the maximum
charge current in order to avoid voltage drops in these traces.
• The device is packaged in a thermally enhanced MLP package. The package includes a thermal pad to
provide an effective thermal contact between the device and the printed circuit board (PCB). Full PCB design
guidelines for this package are provided in the application report entitled, QFN/SON PCB Attachment
(TI Literature Number SLUA271 ).
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