Datasheet
bq24010, bq24012
bq24013, bq24014, bq24018
SLUS530K –SEPTEMBER 2002–REVISED JANUARY 2014
www.ti.com
PCB LAYOUT CONSIDERATIONS
It is important to pay special attention to the PCB layout. The following list provides some guidelines:
• To obtain optimal performance, the decoupling capacitor from V
CC
to V
SS
and the output filter capacitors from
BAT to ISET should be placed as close as possible to the bqTINY, with short trace runs to both signal and
V
SS
pins.
• All low-current V
SS
connections should be kept separate from the high-current charge or discharge paths from
the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
• The BAT pin is the voltage feedback to the device and should be connected with its trace as close to the
battery pack as possible.
• The high current charge paths into IN and from the OUT pins must be sized appropriately for the maximum
charge current in order to avoid voltage drops in these traces.
• The bqTINY is packaged in a thermally enhanced MLP package. The package includes a thermal pad to
provide an effective thermal contact between the device and the printed circuit board (PCB). Full PCB design
guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment
Application Note (SLUA271).
• There is an internal electrical connection between the exposed thermal pad and V
SS
pin of the device. The
exposed thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do
not use the thermal pad as the primary ground input for the device. V
SS
pin must be connected to ground at
all times.
REVISION HISTORY
Changes from Revision J (December 2008) to Revision K Page
• Updated I
O(OUT)
equation ....................................................................................................................................................... 3
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