Datasheet

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SYSTEM DIAGRAM
LDO, ThermOutputDrive&UVLO
PowerManagement
LDO, TOUT,andPowerModecontrol
I
2
C
Impedance Track(TM)+LifetimeDataLogging
SMBus
Pack+
Pack-
Discharge/Charge/
PrechargeFETs
CellandPack
Voltage
Measurement
Precharge
FET Drive
2-TierOvercurrentProtection
32-kHzClock
Generator
bq20z80
768Bytesof
UserFlash
Fuse
1
st
LevelOVand
UVProtection
PackUndervoltage
PowerMode
Control
PrechargeControl
DelayCounters
CellBalancing AlgorithmandControl
CellBalancing
Drive
SystemInterface
SystemWatchdog
VoltageLevel Translator
SystemInterface
32kHz
PowerModeControl
Fail-SafeProtection
T1
1
st
LevelOC
Protection
TemperatureMeasurement
<1%Error
T
INT
SupplyV oltage
bq29312A
PCHFET Drive
RAMRegisters
SBSv1.1Data
bq29312RAM/CommsValidation
2ndLevelOvervoltageProtection
bq294xx
XAlert
Sleep
SenseResistor
(5m-20mWtyp)
PFInput
1
2
7
6
5
4
3
38
37
36
35
34
33
32
VIN
TS1
TS2
PU
PRES
SCLK
VSSD
NC
NC
CLKOUT
XCK1/VSSA
XCK2/ROSC
FILTSAFE
VDDD VDDA
RBI
SDATA
VSSD
SAFE
SR2
SR1
VSSA
VSSA
8
9
10
11
12
31
30
29
28
27
13
14
19
18
17
16
15
26
25
24
23
22
21
20
NC
NC
SMBC
SMBD
DISP
PFIN
MRST
XALERT
LED1
LED2
LED3
LED4
LED5VSSD
NC-Nointernalconnection
bq20z80-V102
SLUS681B – NOVEMBER 2005 – REVISED JANUARY 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
TSSOP (DBT)
(TOP VIEW)
2
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