Datasheet

bq20z45
www.ti.com .................................................................................................................................................................................................. SLUS800 – MARCH 2009
ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range (unless otherwise noted), T
A
= – 40 ° C to 85 ° C, V
(REG25)
= 2.41 V to 2.59 V,
V
(BAT)
= 14 V, C
(REG25)
= 1 µ F, C
(REG33)
= 2.2 µ F; typical values at T
A
= 25 ° C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
C
L
= 4700 pF;
400 1000
V
(PACK)
≤ DSG ≤ V
(PACK)
+ 4V
t
r
Rise time µ s
C
L
= 4700 pF;
400 1000
V
(BAT)
≤ CHG ≤ V
(BAT)
+ 4V
C
L
= 4700pF;
V
(PACK)
+ V
(DSGON)
≤ DSG ≤ V
(PACK)
+ 40 200
1V
t
f
Fall time µ s
C
L
= 4700 pF;
40 200
V
(BAT)
+ V
(CHGON)
≤ CHG ≤ V
(BAT)
+ 1V
V
(ZVCHG)
ZVCHG clamp voltage BAT = 4.5 V 3.3 3.5 3.7 V
LOGIC; T
A
= – 40 ° C to 100 ° C (unless otherwise noted)
ALERT 60 100 200
R
(PULLUP)
Internal pullup resistance k Ω
RESET 1 3 6
ALERT 0.2
RESET; V
(BAT)
= 7V; V
(REG25)
= 1.5 V;
V
OL
Logic low output voltage level 0.4 V
I
(RESET)
= 200 µ A
GPOD; I
(GPOD)
= 50 µ A 0.6
LOGIC SMBC, SMBD, PFIN, PRES, SAFE, ALERT
V
IH
High-level input voltage 2.0 V
V
IL
Low-level input voltage 0.8 V
V
OH
Output voltage high
(1)
I
L
= – 0.5 mA V
REG25
– 0.5 V
V
OL
Low-level output voltage PRES, PFIN, ALERT, I
L
= 7 mA; 0.4 V
C
I
Input capacitance 5 pF
I
(SAFE)
SAFE source currents SAFE active, SAFE = V
(REG25)
– 0.6 V – 3 mA
SAFE leakage current SAFE inactive – 0.2 0.2 µ A
I
lkg
Input leakage current 1 µ A
ADC
(2)
Input voltage range TS1, TS2, using Internal V
ref
– 0.2 1 V
Conversion time 31.5 ms
Resolution (no missing codes) 16 bits
Effective resolution 14 15 bits
%FSR
(
Integral nonlinearity ± 0.03
3)
Offset error
(4)
140 250 µ V
Offset error drift
(4)
T
A
= 25 ° C to 85 ° C 2.5 18 µ V/ ° C
Full-scale error
(5)
± 0.1% ± 0.7%
PPM/
Full-scale error drift 50
° C
Effective input resistance
(6)
8 M Ω
COULOMB COUNTER
Input voltage range – 0.20 0.20 V
Conversion time Single conversion 250 ms
Effective resolution Single conversion 15 bits
– 0.1 V to 0.20 V ± 0.007 ± 0.034
Integral nonlinearity %FSR
– 0.20 V to – 0.1 V ± 0.007
(1) RC[0:7] bus
(2) Unless otherwise specified, the specification limits are valid at all measurement speed modes
(3) Full-scale reference
(4) Post-calibration performance and no I/O changes during conversion with SRN as the ground reference
(5) Uncalibrated performance. This gain error can be eliminated with external calibration.
(6) The A/D input is a switched-capacitor input. Since the input is switched, the effective input resistance is a measure of the average
resistance.
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