Datasheet

bq2060A
SLUS500D –OCTOBER 2001– REVISED OCTOBER 2011 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Pin Descriptions
PIN
DESCRIPTION
NAME NUMBER
HDQ16 1 Serial communication input/output. Open-drain bidirectional communications port
Serial memory clock. Output to clock the data transfer between the bq2060A and the external nonvolatile
ESCL 2
configuration memory
Serial memory data and address. Bidirectional pin used to transfer address and data to and from the bq2060A
ESDA 3
and the external nonvolatile configuration memory.
Register backup input. Input that provides backup potential to the bq2060A registers during periods of low
RBI 4
operating voltage. RBI accepts a storage capacitor or a battery input.
REG 5 Regulator output. Output to control an n-JFET for VCC regulation to the bq2060A from the battery potential
V
OUT
(1)
6 EEPROM supply output. Output that supplies power to the external EEPROM configuration memory
V
CC
(1)
7 Supply voltage input
V
SS
8 Ground
DISP 9 Display control input. Input that controls the LED drivers LED
1
–LED
5
LED
1
–LED
5
10–14 LED display segment outputs. Outputs that each may drive an external LED
DFC 15 Discharge FET control. Output to control the discharge FET in the Li-ion pack protection circuitry
CFC 16 Charge FET control output. Output to control the charge FET in the Li-ion pack protection circuitry
Cell voltage divider control output. Output control for external FETs to connect the cells to the external voltage
CVON 17
dividers during cell voltage measurements
Thermistor bias control. Output control for external FETs to connect the thermistor bias resistor during a
THON 18
temperature measurement
TS 19 Thermistor voltage input. Input connection for a thermistor to monitor temperature
SRC 20 Current sense input. Input to monitor instantaneous current
Charge-flow sense resistor inputs. Input connections for a small value sense resistor to monitor the battery
SR
1
– SR
2
21–22
charge and discharge current flow
VCELL
1
–VC
23–26 Single-cell voltage inputs. Inputs that monitor the series element cell voltages
ELL
4
SMBD 27 SMBus data. Open-drain bidirectional pin used to transfer address and data to and from the bq2060A
SMBC 28 SMBus clock. Open-drain bidirectional pin used to clock the data transfer to and from the bq2060A
(1) CAUTION: Recent changes to some EEPROM ICs have made the timing of the V
OUT
pin unreliable. It is strongly recommended that the
EEPROM is powered from the V
CC
pin (pin 7). Also, it is acceptable to short pins 6 and 7, if needed.
ORDERING INFORMATION
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI Web site at www.ti.com.
2 Submit Documentation Feedback Copyright © 2001–2011, Texas Instruments Incorporated
Product Folder Link(s): bq2060A