Datasheet

ing subsequent discharges, FCC is updated with the
latest measured capacity in the Discharge Count Reg-
ister plus the battery low amount, representing a dis-
charge from full to below EDV1. A qualified dis-
charge is necessary for a capacity transfer from the
DCR to the FCC register. Once updated, the bq2040
writes the new FCC to the EEPROM. The FCC also
serves as the 100% reference threshold used by the
relative state-of-charge calculation and display.
2. DesignCapacity (DC):
The DC is the user-specified battery capacity and is
programmed from external EEPROM. The DC also
provides the 100% reference for the absolute dis
-
play mode.
3. RemainingCapacity (RM):
RM counts up during charge to a maximum value of
FCC and down during discharge and self-discharge to
0. RM is set to the battery low amount after the
EDV1 threshold has been reached. If RM is already
equal to or less than the battery low amount, RM is
not modified. If RM reaches the battery low amount
before the battery voltage falls below EDV1 on dis
-
charge, RM stops counting down until the EDV1
threshold is reached. RM is set to 0 when the battery
voltage reaches EDVF. To prevent overstatement of
charge during periods of overcharge, RM stops in
-
crementing when RM = FCC. RM may optionally
be written to a user-defined value when fully
charged if the battery pack is under bq2040 charge
control. On initialization, RM is set to 0.
4. Discharge Count Register (DCR):
The DCR counts up during discharge independent
of RM and can continue increasing after RM has
decremented to 0. Prior to RM = 0, both discharge
and self-discharge increment the DCR. After RM
= 0, only discharge increments the DCR. The DCR
resets to 0 when RM = FCC and stops counting at
EDV1 on discharge. The DCR does not roll over but
stops counting when it reaches FFFFh.
FCC is updated on the first charge after a qualified
discharge to EDV1. The updated FCC equals the
battery low percentage times the current FCC plus
the DCR value. A qualified discharge to EDV1 oc
-
curs if all of the following conditions exist:
n
No valid charge initiations (charges greater than
10mAh, where V
SRO
>+V
SRD
occurred during
the period between RM = FCC and EDV1 de
-
tected.
n
The self-discharge count is not more than
256mAh.
n
The low temperature fault bit in FLAGS2 is not
set when the EDV1 level is reached during dis
-
charge.
n
Battery voltage is not more than 256mV below
the EDV1 threshold when EDV1 is set.
The valid discharge flag (VDQ) in FLAGS1 indi
-
cates whether the present discharge is valid for an
FCC update. FCC cannot be reduced by more than
256mAh during any single cycle.
7
bq2040
FG294501.eps
Temperature
Compensation
Charge
Current
Discharge
Current
Self-Discharge
Timer
Remaining
Capacity
(RM)
Full
Charge
Capacity
(FCC)
Discharge
Count
Register
(DCR)
<
Qualified
Transfer
+
Temperature, Other Data
+
--
+
Inputs
Main Counters
and Capacity
Reference (FCC)
Outputs
Two-Wire
Serial Interface
Chip-Controlled
Available Charge
LED Display
State-of-charge
and
Temperature
Compensation
Figure 2. Operational Overview