Datasheet

Pin Descriptions
2-2
2.1 Pin Descriptions
BAT+ cell positive
BAT– cell negative
PACK+ pack positive
PACK– pack negative
SDQ serial communications port
PDET pack removal detection
STAT status output
2.2 Schematic
Figure 2–1 is the schematic diagram for the bq2023EVM–001 circuit module
(SLUP142–001).
Figure 2–1. Schematic
J1
12
PACK+
BAT+
R2
100 kΩ
U1
BQ2023PW
R10
100 Ω
RBI STAT
VCC SRP
VSS SRN
SDQ PDET
81
72
63
54
R7
100 kΩ
PACK–
BAT–
J3
1
2
J4
2
1
SDQ
D3
5.6 V
R8
0.02 Ω
C3
0.1 µF
R9
100 kΩ
C2
0.1 µF
R11
100 Ω
C4
0.1 µF
C1
0.1 µF
R1
1 MΩ
STAT
PDET
R4
100 Ω
R3
100 Ω
R6
100 Ω
R5
100 Ω
D1
5.6 V
D2
5.6 V
J2
1
2
Optional Components