Datasheet

www.ti.com
PROGRAM PROFILE BYTE
Other
Command
Codes
bq2022 Transmits
MasterIssuesReset
N
Y
bq2022A
isin
ResetState
FromROM
Command
Program
ProfileCommand?
99h
55h
SDQ SIGNALING
RESET AND PRESENCE PULSE
V
PU
V
IH
V
IL
t
RST
t
PPD
t
PP
RESET
(SentbyHost)
PresencePulse
(Sentbybq2022A)
t
RSTREC
WRITE
bq2022A
SLUS724C SEPTEMBER 2006 REVISED AUGUST 2007
The PROGRAM PROFILE byte is read to determine the WRITE MEMORY programming sequence required by a
specific manufacturer. After issuing a ROM command, the host issues the PROGRAM PROFILE BYTE
command, 99h. Figure 12 shows the the bq2022A responds with 55h. This informs the host that the WRITE
MEMORY programming sequence is the one described in the WRITE MEMORY command section of this data
sheet.
Figure 12. PROGRAM PROFILE Command Flow
All SDQ signaling begins with initializing the device, followed by the host driving the bus low to write a 1 or 0, or
to begin the start frame for a bit read. Figure 13 shows the initialization timing, whereas Figure 14 and Figure 15
show that the host initiates each bit by driving the DATA bus low for the start period, t
WSTRB
/ t
RSTRB
. After the bit
is initiated, either the host continues controlling the bus during a WRITE, or the bq2022A responds during a
READ.
If the DATA bus is driven low for more than 120 μ s, the bq2022A may be reset. Figure 13 shows that if the DATA
bus is driven low for more than 480 μ s, the bq2022A resets and indicates that it is ready by responding with a
PRESENCE PULSE.
Figure 13. Reset Timing Diagram
The WRITE bit timing diagram in Figure 14 shows that the host initiates the transmission by issuing the t
WSTRB
portion of the bit and then either driving the DATA bus low for a WRITE 0, or releasing the DATA bus for a
WRITE 1.
Copyright © 2006 2007, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s) :bq2022A