Datasheet

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WriteStatus
Command?
(55h)
Selected
State
Selected
State
bq2022A ReceivesLow AddressByte
(LSBFirst) AD0to AD7
bq2022A ReceivesHigh AddressByte
(LSBFirst) AD8to AD15
bq2022A Loads Addressinto AddressCounter
bq2022A Receives1ByteofData
andStoresinRAMBuffer
bq2022A TransmitsCRCofWriteStatus
Command, Address,andData
Code5Ah
Received
YN
Y
N
N
Y
ContentsofRAMbuffer AND’edwithcontentsof
datamemoryaspointedtobyaddresscounter .
Programmingtimerequiredtobeatleast
t
bq2022A
TransmitsDataByteof
StatusMemoryPointed
toby AddressCounter
bq2022A WaitsforReset
EndofStatus
Memory?
Y
N
bq2022A
Increments Address
CounterandLoads
New AddressintoCRC
Register
bq2022A
ReceivesDataByte
bq2022A
Calculatesand Transmits
CRCofLoaded Addressand
ShiftedData
V =V ?
DATA PP
EPROG
whenVPP isappliedtothedatapin
bq2022A
SLUS724C SEPTEMBER 2006 REVISED AUGUST 2007
Figure 11. WRITE STATUS Command Flow
Copyright © 2006 2007, Texas Instruments Incorporated Submit Documentation Feedback 11
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