Datasheet

7
Symbol
Register
Name
Loc.
(hex)
Read/
Write
Control Field
7(MSB) 6543210(LSB)
CMDR
Command
register
- Write W/R
AD6 AD5 AD4 AD3 AD2 AD1 AD0
DCRH
Discharge count
register high
byte
7f Read DCRH7 DCRH6 DCRH5 DCRH4 DCRH3 DCRH2 DCRH1 DCRH0
DCRL
Discharge
count register
low byte
7e Read DCRL7 DCRL6 DCRL5 DCRL4 DCRL3 DCRL2 DCRL1 DCRL0
CCRH
Charge count
register
high byte
7d Read CCRH7 CCRH6 CCRH5 CCRH4 CCRH3 CCRH2 CCRH1 CCRH0
CCRL
Charge count
register
low byte
7c Read CCRL7 CCRL6 CCRL5 CCRL4 CCRL3 CCRL2 CCRL1 CCRL0
SCRH
Self-discharge
count register
high byte
7b Read SCRH7 SCRH6 SCRH5 SCRH4 SCRH3 SCRH2 SCRH1 SCRH0
SCRL
Self-discharge
count register
low byte
7a Read SCRL7 SCRL6 SCRL5 SCRL4 SCRL3 SCRL2 SCRL1 SCRL0
DTCH
Discharge
time count
high byte
79 Read DTCH7 DTCH6 DTCH5 DTCH4 DTCH3 DTCH2 DTCH1 DTCH0
DTCL
Discharge
time count
low byte
78 Read DTCL7 DTCL6 DTCL5 DTCL4 DTCL3 DTCL2 DTCL1 DTCL0
CTCH
Charge
time count
high byte
77 Read CTCH7 CTCH6 CTCH5 CTCH4 CTCH3 CTCH2 CTCH1 CTCH0
CTCL
Charge
time count
low byte
76 Read CTCL7 CTCL6 CTCL5 CTCL4 CTCL3 CTCL2 CTCL1 CTCL0
MODE/
WOE
MODE/ wake-
up output
enable
75
Read/
write
OVRDQ CAL STC STD WOE3 WOE2 WOE1 0
TMP/CLR
Tempera
-
ture/Clear
register
74
Read/
write
TMP2 TMP1 TMP0 CTC DTC SCR CCR DCR
OFR
Offset
register
73
Read/
write
OFR7 OFR6 OFR5 OFR4 OFR3 OFR2 OFR1 OFR0
RAM
User
memory
72-00
Read/
write
--------
Notes: 1. MODE/WOE register bit 0 is set to zero at startup and should not be
written to 1 for proper bq2018 operation.
2. OFR value is in two’s complement.
Table 5. bq2018 Command and Status Registers
bq2018