Datasheet

Load Compensation
The load compensation value (address = 0eh) allows the
bq2013H to compensate for small discharge loads that
are below the digital filter. Each increment in the
LCOMP register represents 2µVh. The value in LCOMP
represents the additional amount of discharge applied to
NAC and DCR at a constant rate when V
SRO
<V
SRQ
.
LCOMP compensation is applied in addition to self-
discharge. LCOMP is set to 0 on a full reset. The value
is set by the equation:
LCOMP =
1
289∗V
CLD
where V
CLD
is the desired load correction in volts.
Charge Compensation
The charge-compensation value (address = 0fh) allows
the bq2013H to compensate for battery charge ineffi-
ciencies. This value is initialized from the state of
PROG
5
and represents the fast-charge compensation
factor for < 30°C. The value can be overwritten via the
serial port and is stored in percent. The bq2013H scales
the value in 0fh to determine the compensation at other
rates and temperatures. For example, if PROG
5
=H,
the applied efficiency drops by 5% for each temperature
range, and the trickle rates are 15% below the fast-
charge rates. If the value 55h (85%) is written to
CCOMP, the compensation for trickle charge at > 50°C
is 60%.
Program Pin Data (PPFC)
The PPFC register provides the means to perform a soft-
ware controlled reset of the device. The recommended
reset method for the bq2013H is:
■
Write PPFC to zero
■
Write LMD to zero
After these operations, a software reset occurs.
Resetting the bq2013H sets the following:
■
LMD = PFC
■
VDQ, OCE, LCOMP, and NAC = 0
■
BRP = 1
Battery Voltage Register (VSB)
The battery voltage register is used to read the battery
voltage on the SB pin. The VSB register (address = 7eh)
is updated approximately once per second with the pres
-
ent value of the battery voltage. The battery voltage on
the SB pin is determined by the equation:
V
SB
=
1.2V
VSB
256
∗






Display
The bq2013H can directly display capacity information
using low-power LEDs. If LEDs are used, the segment
pins should be tied to V
CC
, the battery, or the LCOM pin
through resistors for programming the bq2013H.
The bq2013H displays the battery charge state in either
absolute or relative mode. In relative mode, the battery
charge is represented as a percentage of the LMD. Each
LED segment represents 20% of the LMD.
In absolute mode, each segment represents a fixed
amount of charge, based on the initial PFC. In absolute
mode, each segment represents 20% of the PFC. As the
battery wears out over time, it is possible for the LMD
to be below the initial PFC. In this case, all of the LEDs
may not turn on, representing the reduction in the ac-
tual battery capacity.
When DISP
is tied to V
CC
, the SEG
1–5
outputs are inac-
tive. When DISP
is left floating, the display becomes ac-
tive during charge if the NAC registers are counting at a
rate equivalent to V
SRO
> 500µV or fast discharge if the
NAC registers are counting at a rate equivalent to V
SRO
< -2mV. When DISP is pulled low and held, the segment
outputs become active continuously. When released to
high Z, the segment outputs will remain active for 4 sec-
onds.
The segment outputs are modulated as two banks, with
segments 1, 3, and 5 alternating with segments 2 and 4.
The segment outputs are modulated at approximately
320Hz, with each bank active for 30% of the period.
SEG
1
blinks at a 4Hz rate whenever V
SB
has been de-
tected to be below V
EDV1
to indicate a low-battery condi-
tion or NAC is less than 10% of the LMD or PFC, de-
pending on the display mode.
Microregulator
The bq2013H can operate directly from 4 nickel or 3
lead acid cells. To facilitate the power supply require-
ments of the bq2013H, an REF output is provided to
regulate an external low-threshold n-FET. A micropower
source for the bq2013H can be inexpensively built using
the FET and an external resistor.
15
bq2013H