Datasheet
AMC7812
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SBAS513E –JANUARY 2011–REVISED SEPTEMBER 2013
η-FACTOR CORRECTION REGISTER (Read/Write, Addresses = 21h and 22h)
Only the low byte is used; the high byte is ignored.
When using the SPI interface, the following bit configuration must be used; (Default = 0000h).
MSB LSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
0 0 0 0 0 0 0 0 N
ADJUST
When using the I
2
C, the following bit configuration must be used; (Default = 00FFh).
MSB LSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
N
ADJUST
1 1 1 1 1 1 1 1
The N
ADJUST
value for ideality correction is stored as shown in Table 14. η
EFF
is the actual ideality of the
transistor being used. Refer to the Ideality Factor section for more details.
Table 14. N
ADJUST
and η
EFF
Values
N
ADJUST
BINARY HEX DECIMAL η
EFF
0111 1111 7F 127 1.747977
0000 1010 0A 10 1.042759
0000 1000 08 8 1.035616
0000 0110 06 6 1.028571
0000 0100 04 4 1.021622
0000 0010 02 2 1.014765
0000 0001 01 1 1.011371
0000 0000 00 0 1.008 (Default)
1111 1111 FF –1 1.004651
1111 1110 FE –2 1.001325
1111 1100 FC –4 0.994737
1111 1010 FA –6 0.988235
1111 1000 F8 –8 0.981818
1111 0110 F6 –10 0.975484
1000 0000 80 –128 0.706542
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