Datasheet

AMC7812
www.ti.com SBAS513E –JANUARY 2011–REVISED SEPTEMBER 2013
TIMING CHARACTERISTICS: SPI Bus
(1)(2)
At –40°C to +105°C, AV
DD
= DV
DD
= 4.5V to 5.5V, AGND = DGND = 0V, and IOV
DD
= 3.0V to 5.5V, unless otherwise noted.
LIMIT AT T
MIN
, T
MAX
PARAMETER MIN MAX UNIT
f
SCLK
Clock frequency 50 MHz
t
1
SCLK cycle time 20 ns
t
2
SCLK high time 8 ns
t
3
SCLK low time 8 ns
t
4
CS falling edge to SCLK rising edge setup time 5 ns
t
5
Input data setup time 5 ns
t
6
Input data hold time 4 ns
t
7
SCLK falling edge to CS rising edge 10 ns
t
8
Minimum CS high time 30 ns
t
9
Output data valid time 3 20 ns
t
10
CS rising to next SCLK rising edge 3 ns
(1) Specified by design; not production tested.
(2) SDO loaded with 10pF load capacitance for SDO timing specifications, t
R
= t
F
≤ 5 ns.
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