Datasheet

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SDA
SCLK
S Sr SP
t
F
t
F
t
F
t
HD:STA
t
HD:DAT
t
SU:DAT
t
SU:STA
t
BUF
t
SU:STO
t
HIGH
t
LOW
t
HD:STA
t
R
TIMING REQUIREMENTS
AMC6821
SBAS386C – MAY 2006 – REVISED JULY 2007
Figure 1. Timing Specification
At V
DD
= +3V or +5V, and T
A
= – 40 ° C to +125 ° C, unless otherwise noted.
AMC6821
PARAMETER MIN TYP MAX UNIT
f
SCLK
Clock frequency 100 kHz
t
BUF
Bus free time 4.7 µ s
t
SU:STA
Start setup time 4.7 µ s
t
HD:STA
Start hold time 4.0 µ s
t
SU:STO
Stop condition setup time 4.0 µ s
t
LOW
SCLK low time 4.7 µ s
t
HIGH
SCLK high time 4.0 µ s
t
R
SCLK, SDA rise time 1000 ns
t
F
SCLK, SDA fall time 300 ns
t
SU:DAT
Data setup time 350 ns
t
HD:DAT
Data hold time 350 ns
Time from software reset command or power-on to normal operation. During this period,
t
POR
1.5 ms
I
2
C™ communication is not recognized.
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