Datasheet

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AMC6821
SBAS386C – MAY 2006 – REVISED JULY 2007
Configuration Register 4 (Address 0x04, Value After Power-On Reset = 0x08)
BIT NAME R/W DEFAULT DESCRIPTION
7 MODE R/W 0 Required configure bit: User must write a 1 to this location.
Number of pulses per revolution of the fan. Power-on default = 0. PLSPR = 0 for two
6 PSPR R/W 0
pulses/revolution (default), PLSPR = 1 for four pulses per revolution.
When TACH-FAST = 1, the TACH data reading is updated every 250ms. This monitor is
5 TACH-FAST R/W 0 the fast RPM monitor. When TACH-FAST = 0, the TACH data reading is updated every
second. Default = 0, power-on default = 0.
Setting this bit to '1' enables the OVR pin. Clearing this bit ('0') disables the OVR pin
4 OVREN R/W 0
(high-impedance). Default = 0.
3 Reserved R 1 Read back '1'.
2 Reserved R 0 Read-back '0'.
1 Reserved R 0 Read-back '0'.
0 Reserved R 0 Read-back '0'.
Writing the reserved bit has no effect.
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