Datasheet

CLKIN
DATA
t
D
t
CLK
t
HIGH
t
LOW
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
DGND
NC
DVDD
CLKIN
NC
DATA
NC
DGND
AVDD
VINP
VINN
AGND
NC
(1)
NC
NC
AGND
1
2
3
4
8
7
6
5
DVDD
CLKIN
DATA
DGND
AVDD
VINP
VINN
AGND
AMC1204
AMC1204B
www.ti.com SBAS512D –APRIL 2011–REVISED DECEMBER 2013
PIN CONFIGURATIONS
DW PACKAGE
DWV PACKAGE
SO-16
SSO-8
(TOP VIEW)
(TOP VIEW)
(1) NC = no internal connection.
PIN DESCRIPTIONS
PIN#
PIN NAME FUNCTION
DW DWV DESCRIPTION
AVDD 1 1 Power High-side power supply
VINP 2 2 Analog input Noninverting analog input
VINN 3 3 Analog input Inverting analog input
AGND 4, 8
(1)
4 Power High-side ground
DGND 9, 16 5 Power Controller-side ground
DATA 11 6 Digital output Modulator data output
CLKIN 13 7 Digital input Modulator clock input
DVDD 14 8 Power Controller-side power supply
NC 5-7, 10, 12, 15 — — No internal connection; can be tied to any potential or left unconnected
(1) Both pins are connected internally via a low-impedance path; thus, only one of the pins must be tied to the ground plane.
TIMING INFORMATION
Figure 1. Modulator Output Timing
TIMING CHARACTERISTICS FOR Figure 1
Over recommended ranges of supply voltage and operating free-air temperature, unless otherwise noted.
PARAMETER MIN TYP MAX UNIT
t
CLK
CLKIN clock period 45.5 50 200 ns
t
HIGH
CLKIN clock high time 20 25 120 ns
t
LOW
CLKIN clock low time 20 25 120 ns
t
D
Delayed falling edge of CLKIN to DATA valid 2 15 ns
Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: AMC1204 AMC1204B