Datasheet

S
1
S
1
C =3pF
IP
C =3pF
IN
VINN
VINP
AVDD
AGND
AGND
AGND
3pF
R =12.5kW
EFF
3pF
VINN
VINP
Equivalent
Circuit
R =
EFF
f C´
CLKIN DIFF
1
( =20MHz)f
CLKIN
C =4pF
DIFF
AGND
AGND
200W
200W
S
2
S
2
AGND+0.8V
AGND+0.8V
AMC1204
AMC1204B
SBAS512D –APRIL 2011–REVISED DECEMBER 2013 www.ti.com
THEORY OF OPERATION
The differential analog input of the AMC1204 and AMC1204B are implemented with a switched-capacitor circuit.
This switched-capacitor circuit implements a second-order modulator stage that digitizes the input signal into a 1-
bit output stream. The externally-provided clock source at the CLKIN pin is used by the capacitor circuit and the
modulator and should be in the range of 5MHz to 22MHz. The analog input signal is continuously sampled by the
modulator and compared to an internal voltage reference. A digital stream, accurately representing the analog
input voltage over time, appears at the output of the converter at the DATA pin.
ANALOG INPUT
The AMC1204 and AMC1204B measure the differential input signal V
IN
= (VINP – VINN) against the internal
reference of 2.5V using internal capacitors that are continuously charged and discharged. Figure 42 shows the
simplified schematic of the ADC input circuitry; the right side of Figure 42 illustrates the input circuitry with the
capacitors and switches replaced by an equivalent circuit.
In Figure 42, the S
1
switches close during the input sampling phase. With the S
1
switches closed, C
DIFF
charges
to the voltage difference across VINP and VINN. For the discharge phase, both S
1
switches open first and then
both S
2
switches close. C
DIFF
discharges approximately to AGND + 0.8V during this phase. This two-phase
sample/discharge cycle repeats with a period of t
CLKIN
= 1/f
CLKIN
. f
CLKIN
is the operating frequency of the
modulator. The capacitors C
IP
and C
IN
are of parasitic nature and caused by bonding wires and the internal ESD
protection structure.
Figure 42. Equivalent Analog Input Circuit
The input impedance becomes a consideration in designs with high input signal source impedance. This high
impedance may cause degradation in gain, linearity, and THD. The importance of this effect, however, depends
on the desired system performance. This input stage provides the mechanism to achieve low system noise, high
common-mode rejection (105dB), and excellent power-supply rejection.
There are two restrictions on the analog input signals VINP and VINN. First, if the input voltage exceeds the
range AGND – 0.5V to AVDD + 0.3V, the input current must be limited to 10mA because the input protection
diodes on the front end of the converter begin to turn on. In addition, the linearity and the noise performance of
the device are ensured only when the differential analog input voltage remains within ±250mV.
16 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: AMC1204 AMC1204B