Datasheet

AM3517, AM3505
www.ti.com SPRS550E –OCTOBER 2009–REVISED MARCH 2013
2.4 Signal Description
Many signals are available on multiple pins according to the software configuration of the pin multiplexing
options.
1. SIGNAL NAME: The signal name
2. DESCRIPTION: Description of the signal
3. TYPE: Type = Ball type for this specific function:
– I = Input
– O = Output
– Z = High-impedance
– D = Open Drain
– DS = Differential
– A = Analog
4. BALL: Associated ball location
5. SUBSYSTEM PIN MULTIPLEXING: Contains a list of the pin multiplexing options at the
module/subsystem level. The pin function is selected at the module/system level.
Note: The Subsystem Multiplexing Signals are not described in Table 2-1 through Table 2-2.
2.4.1 External Memory Interfaces
Table 2-4. External Memory Interfaces - GPMC Signals Description
SIGNAL NAME[1] DESCRIPTION[2] TYPE[3] ZCN BALL[4] ZER BALL[4] SUBSYSTEM PIN
MULTIPLEXING [5]
gpmc_a1 GPMC Address bit 1 O E3/G5 W5/AA7 gpmc_a17
gpmc_a2 GPMC Address bit 2 O E2/G4 Y5/Y7 gpmc_a18
gpmc_a3 GPMC Address bit 3 O E1/G3 AB4/W7 gpmc_a19
gpmc_a4 GPMC Address bit 4 O F7/G2 AA5/AA9 gpmc_a20
gpmc_a5 GPMC Address bit 5 O F6/G1 AB5/Y8 gpmc_a21
gpmc_a6 GPMC Address bit 6 O F4/H2 AB6/AA8 gpmc_a22
gpmc_a7 GPMC Address bit 7 O F3/H1 AA6/AB8 gpmc_a23
gpmc_a8 GPMC Address bit 8 O F2/J5 W6/W8 gpmc_a24
gpmc_a9 GPMC Address bit 9 O F1/J4 AB7/W10 gpmc_a25
gpmc_a10 GPMC Address bit 10 O G6/J3 Y6/AB9 gpmc_a26
gpmc_a11 GPMC Address bit 11 O J2 AB10
multiplexed on
gpmc_d10
gpmc_a12 GPMC Address bit12 O J1 W9
multiplexed on
gpmc_d11
gpmc_a13 GPMC Address bit13 O K4 AA10
multiplexed on
gpmc_d12
gpmc_a14 GPMC Address bit O K3 Y9
14multiplexed on
gpmc_d13
gpmc_a15 GPMC Address bit15 O K2 V10
multiplexed on
gpmc_d14
gpmc_a16 GPMC Address bit16 O K1 V9
multiplexed on
gpmc_d15
gpmc_a17 GPMC Address bit17 O E3 W5
multiplexed on
gpmc_a1
Copyright © 2009–2013, Texas Instruments Incorporated Terminal Description 57
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