Datasheet

12
13
14
15
16
17
18
19
VSS
VSS
MMC2_DAT4
VDDS_DPLL_
MPU_
USBHOST
LK
J
HGF
ED
C
20
B
A
21
22
VSS
VDDS_
SRAM_MPU
VSS VDDS
VSS
VDD_CORE
VSS
VDD_CORE
VSS
VSS
VDD_CORE
VSS
VDD_COREVDD_CORE
VSS
VSSVSS
VSS
VDDSHVVSS
VDDSHV
DSS_PCLK
UART1_TX ETK_D8 ETK_D10 ETK_D1
ETK_CLK
MCSPI2_
SOMI
MCSPI2_CLK MCSPI1_CLK
VDDSHV
VDDSHV
DSS_HSYNC UART1_RTS
ETK_D9
ETK_D7 ETK_D5
ETK_CTL MCSPI2_CS0 MCSPI1_CS3 MMC2_DAT3 MMC2_DAT6
DSS_DATA0 DSS_VSYNC
UART1_RX ETK_D11 ETK_D2
MCSPI2_
SIMO
MMC2_DAT0 MMC2_DAT5
DSS_DATA1 DSS_ACBIAS
ETK_D6 ETK_D3
MCSPI2_CS1
MCSPI1_SIMO
MMC2_DAT1
DSS_DATA2 DSS_DATA3 DSS_DATA5
VSS VDDSHV
MCSPI1_CS0
DSS_DATA4 DSS_DATA8 DSS_DATA9 DSS_DATA6
VSS VDDSHV VSS
DSS_DATA13 DSS_DATA7 DSS_DATA10 DSS_DATA11
VSS VDDS
DSS_DATA16 DSS_DATA15
DSS_DATA17 DSS_DATA23 DSS_DATA22 DSS_DATA12 JTAG_TCK
DSS_DATA20 DSS_DATA21 DSS_DATA18 JTAG_NTRST JTAG_EMU0
JTAG_TMS_
TMSC
JTAG_TDI
LK
J
HGF
ED
C
B
A
12
13
14
15
16
17
18
19
20
21
22
ETK_D13 ETK_D0
MCSPI1_CS1
UART1_CTS
ETK_D14
ETK_D4
MCSPI1_CS2
ETK_D15 ETK_D12
VDDSHV
MCSPI1_
SOMI
VDDSHV VDDSHV
VSS
VDD_CORE
DSS_DATA19 DSS_DATA14
VDDSHV VSS VDDS
VDD_CORE
VSS
JTAG_RTCK
JTAG_TDO
JTAG_EMU1
VDDSHV VDDSHV
AM3517, AM3505
www.ti.com SPRS550E –OCTOBER 2009–REVISED MARCH 2013
Figure 2-5. ZER Pin Map [Quadrant A]
Copyright © 2009–2013, Texas Instruments Incorporated Terminal Description 13
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