Datasheet

AM3517, AM3505
www.ti.com SPRS550E –OCTOBER 2009–REVISED MARCH 2013
Table 6-4. GPMC/NOR Flash Interface Switching Characteristics Synchronous Mode (continued)
NO. PARAMETER 1.8V, 3.3V UNIT
MIN MAX
F14 t
d(CLKH-nWE)
Delay time, gpmc_clk rising edge to I
(11)
- 1.9 I
(11)
+ 4.1 ns
gpmc_nwe transition
F15 t
d(CLKH-Data)
Delay time, gpmc_clk rising edge to data J
(12)
- 2.1 J
(12)
+ 1.1 ns
bus transition
F17 t
d(CLKH-nBE)
Delay time, gpmc_clk rising edge to J
(12)
- 2.1 J
(12)
+ 1.1 ns
gpmc_nbex_cle transition
F18 t
W(nCSV)
Pulse duration, Read A
(13)
ns
gpmc_ncsx
(4)
low
Write A
(13)
ns
F19 t
W(nBEV)
Pulse duration, Read C
(14)
ns
gpmc_nbe0_cle,
Write C
(14)
ns
gpmc_nbe1 low
F20 t
W(nADVV)
Pulse duration, Read K
(15)
ns
gpmc_nadv_ale low
Write K
(15)
ns
F23 t
d(CLKH-IODIR)
Delay time, gpmc_clk rising edge to H
(10)
- 2.1 H
(10)
+ 4.1 ns
gpmc_io_dir high (IN direction)
F24 t
d(CLKH-IODIRIV)
Delay time, gpmc_clk rising edge to M
(16)
- 2.1 M
(16)
+ 4.1 ns
gpmc_io_dir low (OUT direction)
(11) For WE falling edge (WE activated):
• Case GpmcFCLKDivider = 0:
• I = 0.5 * WEExtraDelay * GPMC_FCLK
• Case GpmcFCLKDivider = 1:
• I = 0.5 * WEExtraDelay * GPMC_FCLK if (ClkActivationTime and WEOnTime are odd) or (ClkActivationTime and WEOnTime are
even)
• I = (1 + 0.5 * WEExtraDelay) * GPMC_FCLK otherwise
• Case GpmcFCLKDivider = 2:
• I = 0.5 * WEExtraDelay * GPMC_FCLK if ((WEOnTime - ClkActivationTime) is a multiple of 3)
• I = (1 + 0.5 * WEExtraDelay) * GPMC_FCLK if ((WEOnTime --ClkActivationTime - 1) is a multiple of 3)
• I = (2 + 0.5 * WEExtraDelay) * GPMC_FCLK if ((WEOnTime - ClkActivationTime - 2) is a multiple of 3)
For WE rising edge (WE deactivated):
• Case GpmcFCLKDivider = 0:
• I = 0.5 * WEExtraDelay * GPMC_FCLK
• Case GpmcFCLKDivider = 1:
• I = 0.5 * WEExtraDelay * GPMC_FCLK if (ClkActivationTime and WEOffTime are odd) or (ClkActivationTime and WEOffTime are
even)
• I = (1 + 0.5 * WEExtraDelay) * GPMC_FCLK otherwise
• Case GpmcFCLKDivider = 2:
• I = 0.5 * WEExtraDelay * GPMC_FCLK if ((WEOffTime - ClkActivationTime) is a multiple of 3)
• I = (1 + 0.5 * WEExtraDelay) * GPMC_FCLK if ((WEOffTime - ClkActivationTime - 1) is a multiple of 3)
• I = (2 + 0.5 * WEExtraDelay) * GPMC_FCLK if ((WEOffTime - ClkActivationTime - 2) is a multiple of 3)
(12) J = GPMC_FCLK period
(13) For single read: A = (CSRdOffTime - CSOnTime) * (TimeParaGranularity + 1) * GPMC_FCLK period
For burst read: A = (CSRdOffTime - CSOnTime + (n 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK period
For burst write: A = (CSWrOffTime - CSOnTime + (n 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK period
with n being the page burst access number.
(14) For single read: C = RdCycleTime * (TimeParaGranularity + 1) * GPMC_FCLK
For burst read: C = (RdCycleTime + (n 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK
For burst write: C = (WrCycleTime + (n 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK with n being the page
burst access number.
(15) For read: K = (ADVRdOffTime - ADVOnTime) * (TimeParaGranularity + 1) * GPMC_FCLK
For write: K = (ADVWrOffTime - ADVOnTime) * (TimeParaGranularity + 1) * GPMC_FCLK
(16) M = (RdCycleTime - AccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK
Above M parameter expression is given as one example of GPMC programming. IO DIR signal will go from IN to OUT after both
RdCycleTime and BusTurnAround completion. Behavior of IO direction signal does depend on kind of successive Read/Write accesses
performed to Memory and multiplexed or non-multiplexed memory addressing scheme, bus keeping feature enabled or not. IO DIR
behavior is automatically handled by GPMC controller.
Copyright © 2009–2013, Texas Instruments Incorporated Timing Requirements and Switching Characteristics 111
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