Datasheet

PRODUCTPREVIEW
SPI_CS[x] (Out)
SPI_SCLK (Out)
SPI_SCLK (Out)
SPI_D[x] (SOMI, In)
Bit n-1 Bit n-2
Bit n-3
Bit n-4
Bit 0
PHA=0
EPOL=1
POL=0
POL=1
8 9
3
4
2
1
2
3
5
SPI_CS[x] (Out)
SPI_SCLK (Out)
SPI_SCLK (Out)
SPI_D[x] (SOMI, In)
Bit n-1 Bit n-2
Bit n-3
Bit 1
Bit 0
PHA=1
EPOL=1
POL=0
POL=1
8 9
3
2
1
2
3
1
4
5
4
5 5
4
1
AM3359, AM3358, AM3357
AM3356, AM3354, AM3352
SPRS717E –OCTOBER 2011–REVISED JANUARY 2013 www.ti.com
Figure 5-88. SPI Master Mode Receive Timing
212 Peripheral Information and Timings Copyright © 2011–2013, Texas Instruments Incorporated
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