Datasheet

PRODUCTPREVIEW
DQ[x]
x = 0, 1
DQS[x]+
DQS[x]-
x = 0, 1
Routed Differentially
DQS[x]
DQ[x]
AM335x
DQ[x]
IO Buffer
DDR3
DQ[x]
IO Buffer
x = 0, 1
AM335x
DQS[x]
IO Buffer
DDR3
DQS[x]
IO Buffer
Routed Differentially
x = 0, 1
DQS[x]-
DQS[x]+
AM3359, AM3358, AM3357
AM3356, AM3354, AM3352
www.ti.com SPRS717E –OCTOBER 2011–REVISED JANUARY 2013
Figure 5-61. DQS[x] Topology
Figure 5-62. DQ[x] Topology
5.5.2.3.5.2 DQS[x] and DQ[x] Routing, Any Number of Allowed DDR3 Devices
Figure 5-63 and Figure 5-64 show the DQS[x] and DQ[x] routing.
Figure 5-63. DQS[x] Routing With Any Number of Allowed DDR3 Devices
Figure 5-64. DQ[x] Routing With Any Number of Allowed DDR3 Devices
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Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352