Datasheet

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DDR_D0
DDR_D7
DDR_DQM0
DDR_DQS0
DDR_DQSn0
DDR_D8
DDR_D15
DDR_DQM1
DDR_DQS1
DDR_DQSn1
DQ0
DQ7
DM
DQS
DQS
BA0
BA2
A0
A15
CS
CAS
RAS
WE
CKE
CK
CK
VREF
DDR_BA0
DDR_BA2
DDR_A0
DDR_A15
DDR_CSn0
DDR_CASn
DDR_RASn
DDR_WEn
DDR_CKE
DDR_CK
DDR_CKn
DDR_VREF
1 K Ω 1%
VDDS_DDR
(A)
8-Bit DDR2
Devices
0.1 µF
0.1 µF
1 K Ω 1%
0.1 µF
(B)
0.1 µF
(B)
ODT
DDR_VTP
49.9
( 1%, 20 mW)
Ω
±
TDDR_ODT
DDR_RESETn
NC
DDR_VREF
AM335x
T
T
T
T
T
T
T
T
T
T
T
DQ0
DQ7
DM
DQS
DQS
BA0
BA2
A0
A15
CS
CAS
RAS
WE
CKE
CK
CK
VREF
ODT
0.1 µF
(B)
AM3359, AM3358, AM3357
AM3356, AM3354, AM3352
SPRS717E –OCTOBER 2011–REVISED JANUARY 2013 www.ti.com
A. VDDS_DDR is the power supply for the DDR2 memories and the AM335x DDR2 interface.
B. One of these capacitors can be eliminated if the divider and its capacitors are placed near a DDR_VREF pin.
C. For all the termination requirements, see Section 5.5.2.2.2.9.
Figure 5-39. 16-Bit DDR2 Interface Using Two 8-Bit DDR2 Devices
156 Peripheral Information and Timings Copyright © 2011–2013, Texas Instruments Incorporated
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