Datasheet

PRODUCTPREVIEW
GPMC_FCLK
gpmc_clk
gpmc_csn[x]
gpmc_a[10:1]
gpmc_be0n_cle
gpmc_be1n
gpmc_advn_ale
gpmc_oen
gpmc_ad[15:0]
gpmc_wait[x]
Valid Address
Valid
Valid
Data IN 0
Data IN 0
FA0
FA9
FA10
FA3
FA1
FA4
FA12
FA13
FA0
FA10
FA5
AM3359, AM3358, AM3357
AM3356, AM3354, AM3352
SPRS717E –OCTOBER 2011–REVISED JANUARY 2013 www.ti.com
A. In gpmc_csn[x], x is equal to 0, 1, 2, 3, 4 or 5. In gpmc_wait[x], x is equal to 0 or 1.
B. FA5 parameter illustrates amount of time required to internally sample input data. It is expressed in number of GPMC
functional clock cycles. From start of read cycle and after FA5 functional clock cycles, input data will be internally
sampled by active functional clock edge. FA5 value must be stored inside AccessTime register bits field.
C. GPMC_FCLK is an internal clock (GPMC functional clock) not provided externally.
Figure 5-21. GPMC and NOR Flash—Asynchronous Read—Single Word
134 Peripheral Information and Timings Copyright © 2011–2013, Texas Instruments Incorporated
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Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352