Datasheet

PRODUCTPREVIEW
gpmc_clk
gpmc_csn[x]
gpmc_be0n_cle
gpmc_be1n
gpmc_a[27:17]
gpmc_ad[15:0]
gpmc_advn_ale
gpmc_oen
gpmc_wait[x]
Valid
Valid
Address (MSB)
Address (LSB)
D0 D1 D2 D3
F4
F6
F4
F2
F8 F8
F10
F13
F12
F12
F11
F9
F7
F3
F0 F1
F1
F5
F6 F7
AM3359, AM3358, AM3357
AM3356, AM3354, AM3352
www.ti.com SPRS717E –OCTOBER 2011–REVISED JANUARY 2013
A. In gpmc_csn[x], x is equal to 0, 1, 2, 3, 4 or 5.
B. In gpmc_wait[x], x is equal to 0 or 1.
Figure 5-19. GPMC and Multiplexed NOR Flash—Synchronous Burst Read
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