Datasheet

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AM335x
(ZCZ Package)
RTC_XTALIN RTC_XTALOUT
N/C
LVCMOS
Digital
Clock
Source
VSS_RTC
VDDS_RTC
AM335x
(ZCE Package)
RTC_XTALIN RTC_XTALOUT
N/C
LVCMOS
Digital
Clock
Source
VDDS_RTC
AM3359, AM3358, AM3357
AM3356, AM3354, AM3352
www.ti.com SPRS717E –OCTOBER 2011–REVISED JANUARY 2013
4.2.2.4 OSC1 LVCMOS Digital Clock Source
Figure 4-14 shows the recommended oscillator connections when OSC1 of the ZCE package is connected
to an LVCMOS square-wave digital clock source and Figure 4-15 shows the recommended oscillator
connections when OSC1 of the ZCZ package is connected to an LVCMOS square-wave digital clock
source. The LVCMOS clock source is connected to the RTC_XTALIN terminal. In this mode of operation,
the RTC_XTALOUT terminal should not be used to source any external components. The printed circuit
board design should provide a mechanism to disconnect the RTC_XTALOUT terminal from any external
components or signal traces that may couple noise into OSC1 via the RTC_XTALOUT terminal.
The RTC_XTALIN terminal does not enable an internal pull-down resistor when OSC1 is disabled. If this
oscillator is disabled, the RTC_XTALIN terminal may float to an invalid logic level which may increase
leakage current through the oscillator input buffer. This should not be an issue for most applications that
use this oscillator to source the RTC clock since the RTC requires a continuous clock to maintain time.
Figure 4-14. OSC1 (ZCE Package) LVCMOS Circuit Schematic
Figure 4-15. OSC1 (ZCZ Package) LVCMOS Circuit Schematic
Table 4-7. OSC1 LVCMOS Reference Clock Requirements
NAME DESCRIPTION MIN TYP MAX UNIT
f
(RTC_XTALIN)
Frequency, LVCMOS reference clock 32.768 MHz
Frequency, LVCMOS reference clock Maximum RTC error = -20 20 ppm
stability and tolerance
(1)
10.512 minutes/year
Maximum RTC error = 26.28 -50 50 ppm
minutes/year
t
dc(RTC_XTALIN)
Duty cycle, LVCMOS reference clock period 45 55 %
t
jpp(RTC_XTALIN)
Jitter peak-to-peak, LVCMOS reference clock period -1 1 %
t
R(RTC_XTALIN)
Time, LVCMOS reference clock rise 5 ns
t
F(RTC_XTALIN)
Time, LVCMOS reference clock fall 5 ns
(1) Initial accuracy, temperature drift, and aging effects should be combined when evaluating a reference clock for this requirement.
Copyright © 2011–2013, Texas Instruments Incorporated Power and Clocking 109
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