Datasheet
SLLS202E − MAY 1995 − REVISED JUNE 2005
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
(each receiver)
DIFFERENTIAL
ENABLES
OUTPUT
DIFFERENTIAL
INPUT
G G
OUTPUT
V
ID
≥ 0.2 V
H
X
X
L
H
H
−0.2 V < V
ID
< 0.2 V
H
X
X
L
?
?
V
ID
≤ −0.2 V
H
X
X
L
L
L
Open, shorted, or
terminated
†
H
X
X
L
H
H
X L H Z
H = high level, L = low level, X = irrelevant,
Z = high impedance (off), ? = indeterminate
†
See application information attached.
logic symbol
‡
4Y
3Y
2Y
1Y
13
11
5
3
4B
4A
3B
3A
2B
2A
1B
1A
G
G
15
14
9
10
7
6
1
2
12
4
EN
≥ 1
‡
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
logic diagram (positive logic)
4Y
3Y
2Y
1Y
13
11
5
3
4B
4A
3B
3A
2B
2A
1B
1A
G
G
15
14
9
10
7
6
1
2
12
4