Datasheet

www.ti.com
ELECTRICAL CHARACTERISTICS
SWITCHING CHARACTERISTICS
AM26C31-EP
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS871 NOVEMBER 2007
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
V
OH
High-level output voltage I
O
= 20 mA 2.2 3.4 V
V
OL
Low-level output voltage I
O
= 20 mA 0.2 0.4 V
|V
OD
| Differential output voltage magnitude R
L
= 100 , See Figure 1 2 3.1 V
Δ |V
OD
| Change in magnitude of differential output voltage
(2)
R
L
= 100 , See Figure 1 ± 0.4 V
V
OC
Common-mode output voltage R
L
= 100 , See Figure 1 3 V
Change in magnitude of common-mode output
Δ |V
OC
| R
L
= 100 , See Figure 1 ± 0.4 V
voltage
(2)
I
I
Input current V
I
= V
CC
or GND ± 1 µ A
V
O
= 6 V 100
I
O(off)
Driver output current with power off V
CC
= 0 µ A
V
O
= 0.25 V 100
I
OS
Driver output short-circuit current V
O
= 0 170 mA
V
O
= 2.5 V 20
I
OZ
High-impedance off-state output current µ A
V
O
= 0.5 V 20
I
O
= 0 V
I
= 0 V or 5 V 100 µ A
I
CC
Quiescent supply current
I
O
= 0 V
I
= 2.4 V or 0.5 V
(3)
3.2 mA
C
I
Input capacitance 6 pF
(1) All typical values are at V
CC
= 5 V and T
A
= 25 ° C.
(2) Δ |V
OD
| and Δ |V
OC
| are the changes in magnitude of V
OD
and V
OC
, respectively, that occur when the input is changed from a high level
to a low level.
(3) This parameter is measured per input. All other inputs are at 0 V or 5 V.
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
Propagation delay time, low- to high-level
t
PLH
S1 is open, See Figure 2 7 12 ns
output
Propagation delay time, high- to low-level
t
PHL
S1 is open, See Figure 2 6.5 12 ns
output
t
sk(p)
Pulse skew time (|t
PLH
t
PHL
|) S1 is open, See Figure 2 0.5 4 ns
t
r(OD)
, t
f(OD)
Differential output rise and fall times S1 is open, See Figure 3 5 12 ns
t
PZH
Output enable time to high level S1 is closed, See Figure 4 10 19 ns
t
PZL
Output enable time to low level S1 is closed, See Figure 4 10 19 ns
t
PHZ
Output disable time from high level S1 is closed, See Figure 4 7 16 ns
t
PLZ
Output disable time from low level S1 is closed, See Figure 4 7 16 ns
C
pd
Power dissipation capacitance (each driver)
(2)
S1 is open, See Figure 2 100 pF
(1) All typical values are at V
CC
= 5 V, T
A
= 25 ° C.
(2) C
pd
is used to estimate the switching losses according to P
D
= C
pd
× V
CC
2
× f, where f is the switching frequency.
4 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated