Datasheet

DAC A
SMA
Connector
R46 0S
DAC B
R133
DNI
TRF3703
LO
RF Out
Fc=125 MHz
R56 0S
R127
DNI
SMA
Connector
SMA
Connector
SMA
Connector
R114
DNI
R120
DNI
R58 0S
R68 0S
TX Setup www.ti.com
Figure 12. AFE722x Schematic
When using the TSW1400 as a pattern generator for the AFE722x,
first the digital interface needs to be configured to match the serial
LVDS interface from the TSW1400.
The following control registers need to be set in the General Setup
tab of the AFE722x programming software.
The USB communication warning sign should also be monitored after
the USB reset to ensure proper communication with the AFE722x
EVM.
Register Bit Setting
Interface Serial LVDS
Master Override Enabled
Serial LVDS 2 Wire
Data Orientation MSB First
Format 2s Complement
Clock Delay Enabled
Clock Delay 300 ps
Frame Clock Delay Disabled
Frame Clock Delay 0 ps
16
AFE722x Evaluation Module (AFE722xEVM) User's Guide SLOU362–February 2013
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