Datasheet

S0498-01
CLAMP
AFE
LNAx
DC Offset
Correction
ACTx
C
ACT
C
IN
C
BYPASS
INPx
INMx
Input
Optional
Diodes
AFE5808
www.ti.com SLOS688C –SEPTEMBER 2010–REVISED APRIL 2012
filter. The effective corner frequency is determined by the capacitor C
BYPASS
connected at INM. With larger
capacitors, the corner frequency is lower. For stable operation at the highest HP filer cut-off frequency, a ≥15 nF
capacitor can be selected. This corner frequency scales almost linearly with the value of the C
BYPASS
. For
example, 15 nF gives a corner frequency of approximately 100 kHz, while 47 nF can give an effective corner
frequency of 33 KHz. The DC offset correction circuit can also be disabled/enabled through register 52[12].
The AFE5808 can be terminated passively or actively. Active termination is preferred in ultrasound application for
reducing reflection from mismatches and achieving better axial resolution without degrading noise figure too
much. Active termination values can be preset to 50, 100, 200, 400Ω; other values also can be programmed by
users through register 52[4:0]. A feedback capacitor is required between ACTx and the signal source as
Figure 64 shows. On the active termination path, a clamping circuit is also used to create a low impedance path
when overload signal is seen by the AFE5808. The clamp circuit limits large input signals at the LNA inputs and
improves the overload recovery performance of the AFE5808. The clamp level can be set to 350mV
PP
, 600
mV
PP
, 1.15 V
PP
automatically depending on the LNA gain settings when register 52[10:9]=0. Other clamp
voltages, such as 1.15 V
PP
, 0.6 V
PP
, and 1.5 V
PP
, are also achievable by setting register 52[10:9]. This clamping
circuit is also designed to obtain good pulse inversion performance and reduce the impact from asymmetric
inputs.
Figure 64. AFE5808 LNA with DC Offset Correction Circuit
VOLTAGE-CONTROLLED ATTENUATOR
The voltage-controlled attenuator is designed to have a linear-in-dB attenuation characteristic; that is, the
average gain loss in dB (refer to Figure 2) is constant for each equal increment of the control voltage (VCNTL) as
shown in Figure 65. A differential control structure is used to reduce common mode noise. A simplified attenuator
structure is shown in the following Figure 65 and Figure 66.
The attenuator is essentially a variable voltage divider that consists of the series input resistor (RS) and seven
shunt FETs placed in parallel and controlled by sequentially activated clipping amplifiers (A1 through A7). VCNTL
is the effective difference between VCNTLP and VCNTLM. Each clipping amplifier can be understood as a
specialized voltage comparator with a soft transfer characteristic and well-controlled output limit voltage.
Reference voltages V1 through V7 are equally spaced over the 0V to 1.5V control voltage range. As the control
voltage increases through the input range of each clipping amplifier, the amplifier output rises from a voltage
where the FET is nearly OFF to VHIGH where the FET is completely ON. As each FET approaches its ON state
and the control voltage continues to rise, the next clipping amplifier/FET combination takes over for the next
portion of the piecewise-linear attenuation characteristic. Thus, low control voltages have most of the FETs
turned OFF, producing minimum signal attenuation. Similarly, high control voltages turn the FETs ON, leading to
maximum signal attenuation. Therefore, each FET acts to decrease the shunt resistance of the voltage divider
formed by Rs and the parallel FET network.
Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback 37
Product Folder Links: AFE5808