Datasheet

S0502-01
500 Ω
I/VSum
Amp
Cext
Cext
Rint/Rext
Rint/Rext
CW_OUTM
CW_OUTP
ExtSum
Amp
LNA1
INM1
LNA2
INM2
LNA8
INM8
CWIorQCHANNEL
Structure
INPUT1
INPUT2
INPUT8
AFENo.2
AFENo.3
AFENo.4
AFENo.1
CW_AMPINP
CW_AMPINM
Mixer 1
Clock
Mixer 2
Clock
Mixer 8
Clock
ACT1
ACT2
ACT8
C
AC
R
SUM
INP1
INP2
INP8
500 Ω
500 Ω
500 Ω
500 Ω
500 Ω
AFE5808A
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SLOS729B OCTOBER 2011REVISED APRIL 2012
Figure 88. CW circuit with Multiple AFE5808As
The CW I/Q channels are well matched internally to suppress image frequency components in Doppler spectrum.
Low tolerance components and precise operational amplifiers should be used for achieving good matching in the
external circuits as well.
CW Clock Selection
The AFE5808A can accept differential LVDS, LVPECL, and other differential clock inputs as well as single-ended
CMOS clock. An internally generated VCM of 2.5V is applied to CW clock inputs, i.e. CLKP_16X/ CLKM_16X
and CLKP_1X/ CLKM_1X. Since this 2.5V VCM is different from the one used in standard LVDS or LVPECL
clocks, AC coupling is required between clock drivers and the AFE5808A CW clock inputs. When CMOS clock is
used, CLKM_1X and CLKM_16X should be tied to ground. Common clock configurations are illustrated in
Figure 89. Appropriate termination is recommended to achieve good signal integrity.
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